[llvm-commits] [llvm] r112798 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp

[Eric Christopher]

Author: echristo
Date: Wed Sep  1 21:30:46 2010
New Revision: 112798

URL: http://llvm.org/viewvc/llvm-project?rev=112798&view=rev
Log:
Clang's -ccc-host-triple was ignoring the arch specifier on my triple,
I don't need to implement this quite yet - and not for ConstantInt anyhow.

Modified:
    llvm/trunk/lib/Target/ARM/ARMFastISel.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=112798&r1=112797&r2=112798&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Wed Sep  1 21:30:46 2010
@@ -323,28 +323,9 @@
 }
 
 unsigned ARMFastISel::TargetMaterializeConstant(const Constant *C) {
-  const ConstantInt *CI = dyn_cast<ConstantInt>(C);
-  if (!CI) return 0;
-  
-  unsigned Opc;
-  bool Signed = true;
-  EVT VT = TLI.getValueType(CI->getType(), true);
-  
-  switch (VT.getSimpleVT().SimpleTy) {
-    default: return 0;
-    case MVT::i1:  Signed = false;     // FALLTHROUGH to handle as i8.
-    case MVT::i8:
-    case MVT::i16:
-    case MVT::i32:
-      Opc = isThumb ? ARM::t2MOVi32imm : ARM::MOVi32imm; break;
-  }
-
-  unsigned Reg = createResultReg(TLI.getRegClassFor(VT));
-  AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc),
-                          Reg)
-                  .addImm(Signed ? (uint64_t) CI->getSExtValue() :
-                                    CI->getZExtValue()));
-  return Reg;
+  // TODO: Implement this for floating point constants and integer constants
+  // if we care about non-v6 architectures.
+  return 0;
 }
 
 bool ARMFastISel::isTypeLegal(const Type *Ty, EVT &VT) {