[llvm-commits] [llvm] r110761 - /llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Bill Wendling isanbard at gmail.com
Tue Aug 10 17:22:27 PDT 2010


Author: void
Date: Tue Aug 10 19:22:27 2010
New Revision: 110761

URL: http://llvm.org/viewvc/llvm-project?rev=110761&view=rev
Log:
Mark ARM compare instructions as isCompare.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=110761&r1=110760&r2=110761&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Aug 10 19:22:27 2010
@@ -496,7 +496,7 @@
 /// AI1_cmp_irs - Defines a set of (op r, {so_imm|r|so_reg}) cmp / test
 /// patterns. Similar to AsI1_bin_irs except the instruction does not produce
 /// a explicit result, only implicitly set CPSR.
-let Defs = [CPSR] in {
+let isCompare = 1, Defs = [CPSR] in {
 multiclass AI1_cmp_irs<bits<4> opcod, string opc, PatFrag opnode,
                        bit Commutable = 0> {
   def ri : AI1<opcod, (outs), (ins GPR:$a, so_imm:$b), DPFrm, IIC_iCMPi,





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