[llvm-commits] [llvm] r110361 - in /llvm/trunk: lib/Target/ARM/ARMInstrInfo.td test/MC/Disassembler/arm-tests.txt

[Bob Wilson]

Author: bwilson
Date: Thu Aug  5 13:59:36 2010
New Revision: 110361

URL: http://llvm.org/viewvc/llvm-project?rev=110361&view=rev
Log:
Add an ARM RSCrr instruction for disassembly only.
Partial fix for PR7792.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
    llvm/trunk/test/MC/Disassembler/arm-tests.txt

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=110361&r1=110360&r2=110361&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Thu Aug  5 13:59:36 2010
@@ -1673,6 +1673,14 @@
                  Requires<[IsARM]> {
     let Inst{25} = 1;
 }
+// The reg/reg form is only defined for the disassembler; for codegen it is
+// equivalent to SUBrr.
+def RSCrr : AsI1<0b0111, (outs GPR:$dst), (ins GPR:$a, GPR:$b),
+                 DPFrm, IIC_iALUr, "rsc", "\t$dst, $a, $b",
+                 [/* For disassembly only; pattern left blank */]> {
+    let Inst{25} = 0;
+    let Inst{11-4} = 0b00000000;
+}
 def RSCrs : AsI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_reg:$b),
                  DPSoRegFrm, IIC_iALUsr, "rsc", "\t$dst, $a, $b",
                  [(set GPR:$dst, (sube_dead_carry so_reg:$b, GPR:$a))]>,

Modified: llvm/trunk/test/MC/Disassembler/arm-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/arm-tests.txt?rev=110361&r1=110360&r2=110361&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/arm-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/arm-tests.txt Thu Aug  5 13:59:36 2010
@@ -65,6 +65,10 @@
 # CHECK:	rsbeq	r0, r2, r0
 0x00 0x00 0x62 0x00
 
+# CHECK-NOT:	rsceqs	r0, r0, r1, lsl #0
+# CHECK:	rsceqs	r0, r0, r1
+0x01 0x00 0xf0 0x00
+
 # CHECK:	sbcs	r0, pc, #1
 0x01 0x00 0xdf 0xe2