[llvm-commits] [llvm] r110360 - in /llvm/trunk/lib/Target/X86: X86Instr64bit.td X86InstrInfo.td

[Eric Christopher]

Author: echristo
Date: Thu Aug  5 13:36:20 2010
New Revision: 110360

URL: http://llvm.org/viewvc/llvm-project?rev=110360&view=rev
Log:
Be a little bit more specific about target for the memory barrier
instructions.

Modified:
    llvm/trunk/lib/Target/X86/X86Instr64bit.td
    llvm/trunk/lib/Target/X86/X86InstrInfo.td

Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=110360&r1=110359&r2=110360&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original)
+++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Thu Aug  5 13:36:20 2010
@@ -1624,7 +1624,8 @@
 def Int_MemBarrierNoSSE64  : RI<0x09, MRM1r, (outs), (ins GR64:$zero),
                            "lock\n\t"
                            "or{q}\t{$zero, (%rsp)|(%rsp), $zero}",
-                           [(X86MemBarrierNoSSE GR64:$zero)]>, LOCK;
+                           [(X86MemBarrierNoSSE GR64:$zero)]>,
+													 Requires<[In64BitMode]>, LOCK;
 
 let Defs = [RAX, EFLAGS], Uses = [RAX] in {
 def LCMPXCHG64 : RI<0xB1, MRMDestMem, (outs), (ins i64mem:$ptr, GR64:$swap),

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=110360&r1=110359&r2=110360&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Thu Aug  5 13:36:20 2010
@@ -3938,7 +3938,8 @@
 def Int_MemBarrierNoSSE  : I<0x09, MRM1r, (outs), (ins GR32:$zero),
                            "lock\n\t"
                            "or{l}\t{$zero, (%esp)|(%esp), $zero}",
-                           [(X86MemBarrierNoSSE GR32:$zero)]>, LOCK;
+                           [(X86MemBarrierNoSSE GR32:$zero)]>,
+ 													 Requires<[In32BitMode]>, LOCK;
 }
 
 // Atomic swap. These are just normal xchg instructions. But since a memory