[llvm-commits] [llvm] r108816 - in /llvm/trunk: lib/Target/Mips/MipsISelLowering.cpp test/CodeGen/Mips/2010-07-20-Select.ll

[Bruno Cardoso Lopes]

Author: bruno
Date: Tue Jul 20 02:58:51 2010
New Revision: 108816

URL: http://llvm.org/viewvc/llvm-project?rev=108816&view=rev
Log:
Fix Mips PR7473. Patch by stetorvs at gmail.com

Added:
    llvm/trunk/test/CodeGen/Mips/2010-07-20-Select.ll
Modified:
    llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp

Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=108816&r1=108815&r2=108816&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Tue Jul 20 02:58:51 2010
@@ -317,13 +317,13 @@
     BB->addSuccessor(sinkMBB);
 
     //  sinkMBB:
-    //   %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMBB ]
+    //   %Result = phi [ %TrueValue, thisMBB ], [ %FalseValue, copy0MBB ]
     //  ...
     BB = sinkMBB;
     BuildMI(*BB, BB->begin(), dl,
             TII->get(Mips::PHI), MI->getOperand(0).getReg())
-      .addReg(MI->getOperand(2).getReg()).addMBB(copy0MBB)
-      .addReg(MI->getOperand(3).getReg()).addMBB(thisMBB);
+      .addReg(MI->getOperand(2).getReg()).addMBB(thisMBB)
+      .addReg(MI->getOperand(3).getReg()).addMBB(copy0MBB);
 
     MI->eraseFromParent();   // The pseudo instruction is gone now.
     return BB;

Added: llvm/trunk/test/CodeGen/Mips/2010-07-20-Select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2010-07-20-Select.ll?rev=108816&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/2010-07-20-Select.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/2010-07-20-Select.ll Tue Jul 20 02:58:51 2010
@@ -0,0 +1,21 @@
+; RUN: llc < %s -march=mips -relocation-model=static | FileCheck %s
+; Fix PR7473
+
+define i32 @main() nounwind readnone {
+entry:
+  %a = alloca i32, align 4                        ; <i32*> [#uses=2]
+  %c = alloca i32, align 4                        ; <i32*> [#uses=2]
+  volatile store i32 1, i32* %a, align 4
+  volatile store i32 0, i32* %c, align 4
+  %0 = volatile load i32* %a, align 4             ; <i32> [#uses=1]
+  %1 = icmp eq i32 %0, 0                          ; <i1> [#uses=1]
+; CHECK: addiu $4, $zero, 3
+  %iftmp.0.0 = select i1 %1, i32 3, i32 0         ; <i32> [#uses=1]
+  %2 = volatile load i32* %c, align 4             ; <i32> [#uses=1]
+  %3 = icmp eq i32 %2, 0                          ; <i1> [#uses=1]
+; CHECK: addu $4, $zero, $3
+; CHECK: addu $2, $5, $4
+  %iftmp.2.0 = select i1 %3, i32 0, i32 5         ; <i32> [#uses=1]
+  %4 = add nsw i32 %iftmp.2.0, %iftmp.0.0         ; <i32> [#uses=1]
+  ret i32 %4
+}