[llvm-commits] [patch] v7M architecture and Cortex-M3 instructions

[Anton Korobeynikov]

Hello

>>+def HasV7A       : Predicate<"Subtarget->hasV7AOps()">;
>>+def HasV7M       : Predicate<"Subtarget->hasV7MOps()">;
> No tabs, please.
Another thing - please make the presence of sdiv / udiv instructions a
subtarget feature (e.g. "T2Divide"), which is enabled by default on
7M.

This way it will be possible to support them outside of M profile.

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University