[llvm-commits] [patch] v7M architecture and Cortex-M3 instructions

[Anton Korobeynikov]

Hello

> This patch implements a separate architecture for v7M and support for
> the Cortex-M3 processor. LLVM should no longer generate invalid v7M
> instructions, and it now generates the v7M-only sdiv and udiv
> instructions.
Overall patch looks good. Few comments:

>       ARMArchVersion = V7A;
>+      if (Len >= Idx+2 && TT[Idx+1] == 'm')
>+         ARMArchVersion = V7M;
Please make V7A a default variant, putting it into else case.

>+  if(!Subtarget->hasV7MOps()) // except these on v7-M
>+  {
Please use the consistent code formatting. Read
http://llvm.org/docs/CodingStandards.html#mechanicalissues for more
information.

>+def HasV7A       : Predicate<"Subtarget->hasV7AOps()">;
>+def HasV7M       : Predicate<"Subtarget->hasV7MOps()">;
No tabs, please.

Please submit the updated patch and I'll commit it.

Thanks!

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With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University