[llvm-commits] [llvm] r91273 - in /llvm/trunk: include/llvm/CodeGen/CalcSpillWeights.h lib/CodeGen/CalcSpillWeights.cpp lib/CodeGen/PreAllocSplitting.cpp lib/CodeGen/RegAllocLinearScan.cpp lib/CodeGen/RegAllocPBQP.cpp lib/CodeGen/SimpleRegisterCoalescing.cpp lib/CodeGen/SimpleRegisterCoalescing.h

Chris Lattner clattner at apple.com
Thu Dec 17 11:41:15 PST 2009


On Dec 13, 2009, at 10:49 PM, Lang Hames wrote:

> Author: lhames
> Date: Mon Dec 14 00:49:42 2009
> New Revision: 91273
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=91273&view=rev
> Log:
> Moved spill weight calculation out of SimpleRegisterCoalescing and into its own pass: CalculateSpillWeights.

Hi Lang,

I'm all for better factoring!  However, does this really make sense to be a pass?  Wouldn't it make more sense to just be an object that the various register allocators can hold?

-Chris

> 
> Added:
>    llvm/trunk/include/llvm/CodeGen/CalcSpillWeights.h
>    llvm/trunk/lib/CodeGen/CalcSpillWeights.cpp
> Modified:
>    llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp
>    llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
>    llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp
>    llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
>    llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h
> 
> Added: llvm/trunk/include/llvm/CodeGen/CalcSpillWeights.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/CalcSpillWeights.h?rev=91273&view=auto
> 
> ==============================================================================
> --- llvm/trunk/include/llvm/CodeGen/CalcSpillWeights.h (added)
> +++ llvm/trunk/include/llvm/CodeGen/CalcSpillWeights.h Mon Dec 14 00:49:42 2009
> @@ -0,0 +1,39 @@
> +//===---------------- lib/CodeGen/CalcSpillWeights.h ------------*- C++ -*-===//
> +//
> +//                     The LLVM Compiler Infrastructure
> +//
> +// This file is distributed under the University of Illinois Open Source
> +// License. See LICENSE.TXT for details.
> +//
> +//===----------------------------------------------------------------------===//
> +
> +
> +#ifndef LLVM_CODEGEN_CALCSPILLWEIGHTS_H
> +#define LLVM_CODEGEN_CALCSPILLWEIGHTS_H
> +
> +#include "llvm/CodeGen/MachineFunctionPass.h"
> +
> +namespace llvm {
> +
> +  class LiveInterval;
> +
> +  /// CalculateSpillWeights - Compute spill weights for all virtual register
> +  /// live intervals.
> +  class CalculateSpillWeights : public MachineFunctionPass {
> +  public:
> +    static char ID;
> +
> +    CalculateSpillWeights() : MachineFunctionPass(&ID) {}
> +
> +    virtual void getAnalysisUsage(AnalysisUsage &au) const;
> +
> +    virtual bool runOnMachineFunction(MachineFunction &fn);    
> +
> +  private:
> +    /// Returns true if the given live interval is zero length.
> +    bool isZeroLengthInterval(LiveInterval *li) const;
> +  };
> +
> +}
> +
> +#endif // LLVM_CODEGEN_CALCSPILLWEIGHTS_H
> 
> Added: llvm/trunk/lib/CodeGen/CalcSpillWeights.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CalcSpillWeights.cpp?rev=91273&view=auto
> 
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/CalcSpillWeights.cpp (added)
> +++ llvm/trunk/lib/CodeGen/CalcSpillWeights.cpp Mon Dec 14 00:49:42 2009
> @@ -0,0 +1,154 @@
> +//===------------------------ CalcSpillWeights.cpp ------------------------===//
> +//
> +//                     The LLVM Compiler Infrastructure
> +//
> +// This file is distributed under the University of Illinois Open Source
> +// License. See LICENSE.TXT for details.
> +//
> +//===----------------------------------------------------------------------===//
> +
> +#define DEBUG_TYPE "calcspillweights"
> +
> +#include "llvm/Function.h"
> +#include "llvm/ADT/SmallSet.h"
> +#include "llvm/CodeGen/CalcSpillWeights.h"
> +#include "llvm/CodeGen/LiveIntervalAnalysis.h"
> +#include "llvm/CodeGen/MachineFunction.h"
> +#include "llvm/CodeGen/MachineLoopInfo.h"
> +#include "llvm/CodeGen/MachineRegisterInfo.h"
> +#include "llvm/CodeGen/SlotIndexes.h"
> +#include "llvm/Support/Debug.h"
> +#include "llvm/Support/raw_ostream.h"
> +#include "llvm/Target/TargetInstrInfo.h"
> +#include "llvm/Target/TargetRegisterInfo.h"
> +
> +using namespace llvm;
> +
> +char CalculateSpillWeights::ID = 0;
> +static RegisterPass<CalculateSpillWeights> X("calcspillweights",
> +                                             "Calculate spill weights");
> +
> +void CalculateSpillWeights::getAnalysisUsage(AnalysisUsage &au) const {
> +  au.addRequired<LiveIntervals>();
> +  au.addRequired<MachineLoopInfo>();
> +  au.setPreservesAll();
> +  MachineFunctionPass::getAnalysisUsage(au);
> +}
> +
> +bool CalculateSpillWeights::runOnMachineFunction(MachineFunction &fn) {
> +
> +  DEBUG(errs() << "********** Compute Spill Weights **********\n"
> +               << "********** Function: "
> +               << fn.getFunction()->getName() << '\n');
> +
> +  LiveIntervals *lis = &getAnalysis<LiveIntervals>();
> +  MachineLoopInfo *loopInfo = &getAnalysis<MachineLoopInfo>();
> +  const TargetInstrInfo *tii = fn.getTarget().getInstrInfo();
> +  MachineRegisterInfo *mri = &fn.getRegInfo();
> +
> +  SmallSet<unsigned, 4> processed;
> +  for (MachineFunction::iterator mbbi = fn.begin(), mbbe = fn.end();
> +       mbbi != mbbe; ++mbbi) {
> +    MachineBasicBlock* mbb = mbbi;
> +    SlotIndex mbbEnd = lis->getMBBEndIdx(mbb);
> +    MachineLoop* loop = loopInfo->getLoopFor(mbb);
> +    unsigned loopDepth = loop ? loop->getLoopDepth() : 0;
> +    bool isExiting = loop ? loop->isLoopExiting(mbb) : false;
> +
> +    for (MachineBasicBlock::const_iterator mii = mbb->begin(), mie = mbb->end();
> +         mii != mie; ++mii) {
> +      const MachineInstr *mi = mii;
> +      if (tii->isIdentityCopy(*mi))
> +        continue;
> +
> +      if (mi->getOpcode() == TargetInstrInfo::IMPLICIT_DEF)
> +        continue;
> +
> +      for (unsigned i = 0, e = mi->getNumOperands(); i != e; ++i) {
> +        const MachineOperand &mopi = mi->getOperand(i);
> +        if (!mopi.isReg() || mopi.getReg() == 0)
> +          continue;
> +        unsigned reg = mopi.getReg();
> +        if (!TargetRegisterInfo::isVirtualRegister(mopi.getReg()))
> +          continue;
> +        // Multiple uses of reg by the same instruction. It should not
> +        // contribute to spill weight again.
> +        if (!processed.insert(reg))
> +          continue;
> +
> +        bool hasDef = mopi.isDef();
> +        bool hasUse = !hasDef;
> +        for (unsigned j = i+1; j != e; ++j) {
> +          const MachineOperand &mopj = mi->getOperand(j);
> +          if (!mopj.isReg() || mopj.getReg() != reg)
> +            continue;
> +          hasDef |= mopj.isDef();
> +          hasUse |= mopj.isUse();
> +          if (hasDef && hasUse)
> +            break;
> +        }
> +
> +        LiveInterval &regInt = lis->getInterval(reg);
> +        float weight = lis->getSpillWeight(hasDef, hasUse, loopDepth);
> +        if (hasDef && isExiting) {
> +          // Looks like this is a loop count variable update.
> +          SlotIndex defIdx = lis->getInstructionIndex(mi).getDefIndex();
> +          const LiveRange *dlr =
> +            lis->getInterval(reg).getLiveRangeContaining(defIdx);
> +          if (dlr->end > mbbEnd)
> +            weight *= 3.0F;
> +        }
> +        regInt.weight += weight;
> +      }
> +      processed.clear();
> +    }
> +  }
> +
> +  for (LiveIntervals::iterator I = lis->begin(), E = lis->end(); I != E; ++I) {
> +    LiveInterval &li = *I->second;
> +    if (TargetRegisterInfo::isVirtualRegister(li.reg)) {
> +      // If the live interval length is essentially zero, i.e. in every live
> +      // range the use follows def immediately, it doesn't make sense to spill
> +      // it and hope it will be easier to allocate for this li.
> +      if (isZeroLengthInterval(&li)) {
> +        li.weight = HUGE_VALF;
> +        continue;
> +      }
> +
> +      bool isLoad = false;
> +      SmallVector<LiveInterval*, 4> spillIs;
> +      if (lis->isReMaterializable(li, spillIs, isLoad)) {
> +        // If all of the definitions of the interval are re-materializable,
> +        // it is a preferred candidate for spilling. If non of the defs are
> +        // loads, then it's potentially very cheap to re-materialize.
> +        // FIXME: this gets much more complicated once we support non-trivial
> +        // re-materialization.
> +        if (isLoad)
> +          li.weight *= 0.9F;
> +        else
> +          li.weight *= 0.5F;
> +      }
> +
> +      // Slightly prefer live interval that has been assigned a preferred reg.
> +      std::pair<unsigned, unsigned> Hint = mri->getRegAllocationHint(li.reg);
> +      if (Hint.first || Hint.second)
> +        li.weight *= 1.01F;
> +
> +      // Divide the weight of the interval by its size.  This encourages
> +      // spilling of intervals that are large and have few uses, and
> +      // discourages spilling of small intervals with many uses.
> +      li.weight /= lis->getApproximateInstructionCount(li) * SlotIndex::NUM;
> +    }
> +  }
> +  
> +  return false;
> +}
> +
> +/// Returns true if the given live interval is zero length.
> +bool CalculateSpillWeights::isZeroLengthInterval(LiveInterval *li) const {
> +  for (LiveInterval::Ranges::const_iterator
> +       i = li->ranges.begin(), e = li->ranges.end(); i != e; ++i)
> +    if (i->end.getPrevIndex() > i->start)
> +      return false;
> +  return true;
> +}
> 
> Modified: llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp?rev=91273&r1=91272&r2=91273&view=diff
> 
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp (original)
> +++ llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp Mon Dec 14 00:49:42 2009
> @@ -16,6 +16,7 @@
> 
> #define DEBUG_TYPE "pre-alloc-split"
> #include "VirtRegMap.h"
> +#include "llvm/CodeGen/CalcSpillWeights.h"
> #include "llvm/CodeGen/LiveIntervalAnalysis.h"
> #include "llvm/CodeGen/LiveStackAnalysis.h"
> #include "llvm/CodeGen/MachineDominators.h"
> @@ -104,6 +105,7 @@
>       AU.addRequired<LiveStacks>();
>       AU.addPreserved<LiveStacks>();
>       AU.addPreserved<RegisterCoalescer>();
> +      AU.addPreserved<CalculateSpillWeights>();
>       if (StrongPHIElim)
>         AU.addPreservedID(StrongPHIEliminationID);
>       else
> 
> Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp?rev=91273&r1=91272&r2=91273&view=diff
> 
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original)
> +++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Mon Dec 14 00:49:42 2009
> @@ -16,6 +16,7 @@
> #include "VirtRegRewriter.h"
> #include "Spiller.h"
> #include "llvm/Function.h"
> +#include "llvm/CodeGen/CalcSpillWeights.h"
> #include "llvm/CodeGen/LiveIntervalAnalysis.h"
> #include "llvm/CodeGen/LiveStackAnalysis.h"
> #include "llvm/CodeGen/MachineFunctionPass.h"
> @@ -187,6 +188,7 @@
>       // Make sure PassManager knows which analyses to make available
>       // to coalescing and which analyses coalescing invalidates.
>       AU.addRequiredTransitive<RegisterCoalescer>();
> +      AU.addRequired<CalculateSpillWeights>();
>       if (PreSplitIntervals)
>         AU.addRequiredID(PreAllocSplittingID);
>       AU.addRequired<LiveStacks>();
> 
> Modified: llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp?rev=91273&r1=91272&r2=91273&view=diff
> 
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp (original)
> +++ llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp Mon Dec 14 00:49:42 2009
> @@ -36,6 +36,7 @@
> #include "PBQP/Heuristics/Briggs.h"
> #include "VirtRegMap.h"
> #include "VirtRegRewriter.h"
> +#include "llvm/CodeGen/CalcSpillWeights.h"
> #include "llvm/CodeGen/LiveIntervalAnalysis.h"
> #include "llvm/CodeGen/LiveStackAnalysis.h"
> #include "llvm/CodeGen/MachineFunctionPass.h"
> @@ -90,6 +91,7 @@
>       au.addRequired<LiveIntervals>();
>       //au.addRequiredID(SplitCriticalEdgesID);
>       au.addRequired<RegisterCoalescer>();
> +      au.addRequired<CalculateSpillWeights>();
>       au.addRequired<LiveStacks>();
>       au.addPreserved<LiveStacks>();
>       au.addRequired<MachineLoopInfo>();
> 
> Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=91273&r1=91272&r2=91273&view=diff
> 
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Mon Dec 14 00:49:42 2009
> @@ -2622,114 +2622,6 @@
>   ReMatDefs.clear();
> }
> 
> -/// Returns true if the given live interval is zero length.
> -static bool isZeroLengthInterval(LiveInterval *li, LiveIntervals *li_) {
> -  for (LiveInterval::Ranges::const_iterator
> -         i = li->ranges.begin(), e = li->ranges.end(); i != e; ++i)
> -    if (i->end.getPrevIndex() > i->start)
> -      return false;
> -  return true;
> -}
> -
> -
> -void SimpleRegisterCoalescing::CalculateSpillWeights() {
> -  SmallSet<unsigned, 4> Processed;
> -  for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end();
> -       mbbi != mbbe; ++mbbi) {
> -    MachineBasicBlock* MBB = mbbi;
> -    SlotIndex MBBEnd = li_->getMBBEndIdx(MBB);
> -    MachineLoop* loop = loopInfo->getLoopFor(MBB);
> -    unsigned loopDepth = loop ? loop->getLoopDepth() : 0;
> -    bool isExiting = loop ? loop->isLoopExiting(MBB) : false;
> -
> -    for (MachineBasicBlock::const_iterator mii = MBB->begin(), mie = MBB->end();
> -         mii != mie; ++mii) {
> -      const MachineInstr *MI = mii;
> -      if (tii_->isIdentityCopy(*MI))
> -        continue;
> -
> -      if (MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF)
> -        continue;
> -
> -      for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
> -        const MachineOperand &mopi = MI->getOperand(i);
> -        if (!mopi.isReg() || mopi.getReg() == 0)
> -          continue;
> -        unsigned Reg = mopi.getReg();
> -        if (!TargetRegisterInfo::isVirtualRegister(mopi.getReg()))
> -          continue;
> -        // Multiple uses of reg by the same instruction. It should not
> -        // contribute to spill weight again.
> -        if (!Processed.insert(Reg))
> -          continue;
> -
> -        bool HasDef = mopi.isDef();
> -        bool HasUse = !HasDef;
> -        for (unsigned j = i+1; j != e; ++j) {
> -          const MachineOperand &mopj = MI->getOperand(j);
> -          if (!mopj.isReg() || mopj.getReg() != Reg)
> -            continue;
> -          HasDef |= mopj.isDef();
> -          HasUse |= mopj.isUse();
> -          if (HasDef && HasUse)
> -            break;
> -        }
> -
> -        LiveInterval &RegInt = li_->getInterval(Reg);
> -        float Weight = li_->getSpillWeight(HasDef, HasUse, loopDepth);
> -        if (HasDef && isExiting) {
> -          // Looks like this is a loop count variable update.
> -          SlotIndex DefIdx = li_->getInstructionIndex(MI).getDefIndex();
> -          const LiveRange *DLR =
> -            li_->getInterval(Reg).getLiveRangeContaining(DefIdx);
> -          if (DLR->end > MBBEnd)
> -            Weight *= 3.0F;
> -        }
> -        RegInt.weight += Weight;
> -      }
> -      Processed.clear();
> -    }
> -  }
> -
> -  for (LiveIntervals::iterator I = li_->begin(), E = li_->end(); I != E; ++I) {
> -    LiveInterval &LI = *I->second;
> -    if (TargetRegisterInfo::isVirtualRegister(LI.reg)) {
> -      // If the live interval length is essentially zero, i.e. in every live
> -      // range the use follows def immediately, it doesn't make sense to spill
> -      // it and hope it will be easier to allocate for this li.
> -      if (isZeroLengthInterval(&LI, li_)) {
> -        LI.weight = HUGE_VALF;
> -        continue;
> -      }
> -
> -      bool isLoad = false;
> -      SmallVector<LiveInterval*, 4> SpillIs;
> -      if (li_->isReMaterializable(LI, SpillIs, isLoad)) {
> -        // If all of the definitions of the interval are re-materializable,
> -        // it is a preferred candidate for spilling. If non of the defs are
> -        // loads, then it's potentially very cheap to re-materialize.
> -        // FIXME: this gets much more complicated once we support non-trivial
> -        // re-materialization.
> -        if (isLoad)
> -          LI.weight *= 0.9F;
> -        else
> -          LI.weight *= 0.5F;
> -      }
> -
> -      // Slightly prefer live interval that has been assigned a preferred reg.
> -      std::pair<unsigned, unsigned> Hint = mri_->getRegAllocationHint(LI.reg);
> -      if (Hint.first || Hint.second)
> -        LI.weight *= 1.01F;
> -
> -      // Divide the weight of the interval by its size.  This encourages
> -      // spilling of intervals that are large and have few uses, and
> -      // discourages spilling of small intervals with many uses.
> -      LI.weight /= li_->getApproximateInstructionCount(LI) * InstrSlots::NUM;
> -    }
> -  }
> -}
> -
> -
> bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) {
>   mf_ = &fn;
>   mri_ = &fn.getRegInfo();
> @@ -2860,8 +2752,6 @@
>     }
>   }
> 
> -  CalculateSpillWeights();
> -
>   DEBUG(dump());
>   return true;
> }
> 
> Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h?rev=91273&r1=91272&r2=91273&view=diff
> 
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h (original)
> +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h Mon Dec 14 00:49:42 2009
> @@ -244,10 +244,6 @@
>     MachineOperand *lastRegisterUse(SlotIndex Start, SlotIndex End,
>                                     unsigned Reg, SlotIndex &LastUseIdx) const;
> 
> -    /// CalculateSpillWeights - Compute spill weights for all virtual register
> -    /// live intervals.
> -    void CalculateSpillWeights();
> -
>     void printRegName(unsigned reg) const;
>   };
> 
> 
> 
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