[llvm-commits] [llvm] r77175 - in /llvm/trunk/lib/Target/ARM: ARMBaseInstrInfo.cpp Thumb2InstrInfo.cpp

[Evan Cheng]

Author: evancheng
Date: Sun Jul 26 19:33:08 2009
New Revision: 77175

URL: http://llvm.org/viewvc/llvm-project?rev=77175&view=rev
Log:
Use the right instructions to copy between GPR and the more strictive tGPR classes. t2MOV does not match the RC requirements.

Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
    llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=77175&r1=77174&r2=77175&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Sun Jul 26 19:33:08 2009
@@ -612,7 +612,7 @@
   }
 
   if (DestRC == ARM::GPRRegisterClass)
-    AddDefaultCC(AddDefaultPred(BuildMI(MBB, I, DL, get(getOpcode(ARMII::MOVr)),
+    AddDefaultCC(AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::MOVr),
                                         DestReg).addReg(SrcReg)));
   else if (DestRC == ARM::SPRRegisterClass)
     AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::FCPYS), DestReg)

Modified: llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp?rev=77175&r1=77174&r2=77175&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp Sun Jul 26 19:33:08 2009
@@ -84,14 +84,21 @@
   DebugLoc DL = DebugLoc::getUnknownLoc();
   if (I != MBB.end()) DL = I->getDebugLoc();
 
-  if ((DestRC == ARM::GPRRegisterClass &&
-       SrcRC == ARM::tGPRRegisterClass) ||
-      (DestRC == ARM::tGPRRegisterClass &&
-       SrcRC == ARM::GPRRegisterClass)) {
+  if (DestRC == ARM::GPRRegisterClass &&
+      SrcRC == ARM::GPRRegisterClass) {
     AddDefaultCC(AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::t2MOVr),
                                         DestReg).addReg(SrcReg)));
     return true;
+  } else if (DestRC == ARM::GPRRegisterClass &&
+      SrcRC == ARM::tGPRRegisterClass) {
+    BuildMI(MBB, I, DL, get(ARM::tMOVtgpr2gpr), DestReg).addReg(SrcReg);
+    return true;
+  } else if (DestRC == ARM::tGPRRegisterClass &&
+             SrcRC == ARM::GPRRegisterClass) {
+    BuildMI(MBB, I, DL, get(ARM::tMOVgpr2tgpr), DestReg).addReg(SrcReg);
+    return true;
   }
 
+  // Handle SPR, DPR, and QPR copies.
   return ARMBaseInstrInfo::copyRegToReg(MBB, I, DestReg, SrcReg, DestRC, SrcRC);
 }