[llvm-commits] [llvm] r76848 - in /llvm/trunk/test/CodeGen/X86: sse41.ll vec_insert-4.ll
Chris Lattner
sabre at nondot.org
Wed Jul 22 21:33:25 PDT 2009
Author: lattner
Date: Wed Jul 22 23:33:02 2009
New Revision: 76848
URL: http://llvm.org/viewvc/llvm-project?rev=76848&view=rev
Log:
change a test to run in filecheck style. Rename it to be a general
dumping ground of various SSE4.1 tests, since filecheck can reasonably
handle them all in one file. Generalize it to check x86-64 stuff as
well since it has a different ABI (a convenient way to test both the
reg and mem forms of these instructions).
Added:
llvm/trunk/test/CodeGen/X86/sse41.ll
Removed:
llvm/trunk/test/CodeGen/X86/vec_insert-4.ll
Added: llvm/trunk/test/CodeGen/X86/sse41.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse41.ll?rev=76848&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse41.ll (added)
+++ llvm/trunk/test/CodeGen/X86/sse41.ll Wed Jul 22 23:33:02 2009
@@ -0,0 +1,23 @@
+; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin9 -mattr=sse41 | FileCheck %s -check-prefix=X32
+; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin9 -mattr=sse41 | FileCheck %s -check-prefix=X64
+
+
+define <4 x i32> @pinsrd(i32 %s, <4 x i32> %tmp) nounwind {
+ %tmp1 = insertelement <4 x i32> %tmp, i32 %s, i32 1
+ ret <4 x i32> %tmp1
+; X32: pinsrd:
+; X32: pinsrd $1, 4(%esp), %xmm0
+
+; X64: pinsrd:
+; X64: pinsrd $1, %edi, %xmm0
+}
+
+define <16 x i8> @pinsrb(i8 %s, <16 x i8> %tmp) nounwind {
+ %tmp1 = insertelement <16 x i8> %tmp, i8 %s, i32 1
+ ret <16 x i8> %tmp1
+; X32: pinsrb:
+; X32: pinsrb $1, 4(%esp), %xmm0
+
+; X64: pinsrb:
+; X64: pinsrb $1, %edi, %xmm0
+}
Removed: llvm/trunk/test/CodeGen/X86/vec_insert-4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_insert-4.ll?rev=76847&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_insert-4.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_insert-4.ll (removed)
@@ -1,12 +0,0 @@
-; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 | grep pinsrd | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 | grep pinsrb | count 1
-
-define <4 x i32> @t1(i32 %s, <4 x i32> %tmp) nounwind {
- %tmp1 = insertelement <4 x i32> %tmp, i32 %s, i32 1
- ret <4 x i32> %tmp1
-}
-
-define <16 x i8> @t2(i8 %s, <16 x i8> %tmp) nounwind {
- %tmp1 = insertelement <16 x i8> %tmp, i8 %s, i32 1
- ret <16 x i8> %tmp1
-}
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