[llvm-commits] [llvm] r75920 - /llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td

Anton Korobeynikov asl at math.spbu.ru
Thu Jul 16 06:34:26 PDT 2009


Author: asl
Date: Thu Jul 16 08:34:24 2009
New Revision: 75920

URL: http://llvm.org/viewvc/llvm-project?rev=75920&view=rev
Log:
Proper match halfword-imm operands for mov and add

Modified:
    llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td

Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td?rev=75920&r1=75919&r2=75920&view=diff

==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td Thu Jul 16 08:34:24 2009
@@ -66,6 +66,13 @@
   return ((N->getZExtValue() & 0xFFFF000000000000ULL) == N->getZExtValue());
 }], HH16>;
 
+def immSExt16 : PatLeaf<(i64 imm), [{
+  // immSExt16 predicate - true if the immediate fits in a 16-bit sign extended
+  // field.
+  uint64_t val = N->getZExtValue();
+  return ((int64_t)val == (int16_t)val);
+}]>;
+
 //===----------------------------------------------------------------------===//
 //  Control Flow Instructions...
 //
@@ -87,9 +94,9 @@
 
 // FIXME: Provide proper encoding!
 let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
-def MOV64ri : Pseudo<(outs GR64:$dst), (ins i64imm:$src),
-                     "lghi\t{$dst, $src}",
-                     [(set GR64:$dst, imm:$src)]>;
+def MOV64ri16 : Pseudo<(outs GR64:$dst), (ins i64imm:$src),
+                       "lghi\t{$dst, $src}",
+                       [(set GR64:$dst, immSExt16:$src)]>;
 }
 
 //===----------------------------------------------------------------------===//
@@ -108,10 +115,10 @@
 }
 
 // FIXME: Provide proper encoding!
-def ADD64ri : Pseudo<(outs GR64:$dst), (ins GR64:$src1, i64imm:$src2),
-                     "aghi\t{$dst, $src2}",
-                     [(set GR64:$dst, (add GR64:$src1, imm:$src2)),
-                      (implicit PSW)]>;
+def ADD64ri16 : Pseudo<(outs GR64:$dst), (ins GR64:$src1, i64imm:$src2),
+                       "aghi\t{$dst, $src2}",
+                       [(set GR64:$dst, (add GR64:$src1, immSExt16:$src2)),
+                        (implicit PSW)]>;
 
 let isCommutable = 1 in { // X = AND Y, Z  == X = AND Z, Y
 // FIXME: Provide proper encoding!





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