[llvm-commits] [llvm] r75913 - in /llvm/trunk: lib/Target/SystemZ/SystemZInstrInfo.td lib/Target/SystemZ/SystemZRegisterInfo.td test/CodeGen/SystemZ/02-RetAdd.ll test/CodeGen/SystemZ/02-RetAddImm.ll

[Anton Korobeynikov]

Author: asl
Date: Thu Jul 16 08:30:15 2009
New Revision: 75913

URL: http://llvm.org/viewvc/llvm-project?rev=75913&view=rev
Log:
Add add reg-reg and reg-imm patterns

Added:
    llvm/trunk/test/CodeGen/SystemZ/02-RetAdd.ll
    llvm/trunk/test/CodeGen/SystemZ/02-RetAddImm.ll
Modified:
    llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
    llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.td

Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td?rev=75913&r1=75912&r2=75913&view=diff

==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td Thu Jul 16 08:30:15 2009
@@ -47,3 +47,27 @@
                      "lghi\t{$dst, $src}",
                      [(set GR64:$dst, imm:$src)]>;
 }
+
+//===----------------------------------------------------------------------===//
+// Arithmetic Instructions
+
+let isTwoAddress = 1 in {
+
+let Defs = [PSW] in {
+
+let isCommutable = 1 in { // X = ADD Y, Z  == X = ADD Z, Y
+// FIXME: Provide proper encoding!
+def ADD64rr : Pseudo<(outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
+                     "agr\t{$dst, $src2}",
+                     [(set GR64:$dst, (add GR64:$src1, GR64:$src2)),
+                      (implicit PSW)]>;
+}
+
+// FIXME: Provide proper encoding!
+def ADD64ri : Pseudo<(outs GR64:$dst), (ins GR64:$src1, i64imm:$src2),
+                     "aghi\t{$dst, $src2}",
+                     [(set GR64:$dst, (add GR64:$src1, imm:$src2)),
+                      (implicit PSW)]>;
+
+} // Defs = [PSW]
+} // isTwoAddress = 1

Modified: llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.td?rev=75913&r1=75912&r2=75913&view=diff

==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.td Thu Jul 16 08:30:15 2009
@@ -62,8 +62,11 @@
 def F14 : FPR<14, "f14">, DwarfRegNum<[30]>;
 def F15 : FPR<15, "f15">, DwarfRegNum<[31]>;
 
+// Status register
+def PSW : SystemZReg<"psw">;
+
 /// Register classes
-def GR64 : RegisterClass<"SystemZ", [i64], 16,
+def GR64 : RegisterClass<"SystemZ", [i64], 64,
    // Volatile registers
   [R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R12, R13, 
    // Frame pointer, sometimes allocable
@@ -91,3 +94,8 @@
 
 def FP64 : RegisterClass<"SystemZ", [f64], 64,
  [F0, F1, F2, F3, F4, F5, F6, F7, F8, F9, F10, F11, F12, F13, F14, F15]>;
+
+// Status flags registers.
+def CCR : RegisterClass<"SystemZ", [i64], 64, [PSW]> {
+  let CopyCost = -1;  // Don't allow copying of status registers.
+}

Added: llvm/trunk/test/CodeGen/SystemZ/02-RetAdd.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SystemZ/02-RetAdd.ll?rev=75913&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/SystemZ/02-RetAdd.ll (added)
+++ llvm/trunk/test/CodeGen/SystemZ/02-RetAdd.ll Thu Jul 16 08:30:15 2009
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llc
+define i64 @foo(i64 %a, i64 %b) {
+entry:
+    %c = add i64 %a, %b
+    ret i64 %c
+}
\ No newline at end of file

Added: llvm/trunk/test/CodeGen/SystemZ/02-RetAddImm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SystemZ/02-RetAddImm.ll?rev=75913&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/SystemZ/02-RetAddImm.ll (added)
+++ llvm/trunk/test/CodeGen/SystemZ/02-RetAddImm.ll Thu Jul 16 08:30:15 2009
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llc
+define i64 @foo(i64 %a, i64 %b) {
+entry:
+    %c = add i64 %a, 1
+    ret i64 %c
+}
\ No newline at end of file