[llvm-commits] [llvm] r73761 - /llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

[Evan Cheng]

Author: evancheng
Date: Fri Jun 19 02:06:07 2009
New Revision: 73761

URL: http://llvm.org/viewvc/llvm-project?rev=73761&view=rev
Log:
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Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=73761&r1=73760&r2=73761&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Fri Jun 19 02:06:07 2009
@@ -294,6 +294,10 @@
 
   if (!Subtarget->isThumb()) {
     // Use branch latency information to determine if-conversion limits.
+    // FIXME: If-converter should use instruction latency of the branch being
+    // eliminated to compute the threshold. For ARMv6, the branch "latency"
+    // varies depending on whether it's dynamically or statically predicted
+    // and on whether the destination is in the prefetch buffer.
     const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();
     const InstrItineraryData &InstrItins = Subtarget->getInstrItineraryData();
     unsigned Latency= InstrItins.getLatency(TII->get(ARM::Bcc).getSchedClass());