[llvm-commits] [llvm] r73760 - in /llvm/trunk: lib/Target/X86/X86InstrSSE.td test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll

[Eli Friedman]

Author: efriedma
Date: Fri Jun 19 02:00:55 2009
New Revision: 73760

URL: http://llvm.org/viewvc/llvm-project?rev=73760&view=rev
Log:
Fix for PR2484: add an SSE1 pattern for a shuffle we normally prefer to 
handle with an SSE2 instruction.


Added:
    llvm/trunk/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll
Modified:
    llvm/trunk/lib/Target/X86/X86InstrSSE.td

Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=73760&r1=73759&r2=73760&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Fri Jun 19 02:00:55 2009
@@ -3027,6 +3027,12 @@
           (MOVLPDrr VR128:$src1, VR128:$src2)>, Requires<[HasSSE2]>;
 }
 
+// vector_shuffle v1, v2 <4, 5, 2, 3> using SHUFPSrri (we prefer movsd, but
+// fall back to this for SSE1)
+def : Pat<(v4f32 (movlp:$src3 VR128:$src1, (v4f32 VR128:$src2))),
+          (SHUFPSrri VR128:$src2, VR128:$src1, 
+                     (SHUFFLE_get_shuf_imm VR128:$src3))>, Requires<[HasSSE1]>;
+
 // Set lowest element and zero upper elements.
 let AddedComplexity = 15 in
 def : Pat<(v2f64 (movl immAllZerosV_bc, VR128:$src)),

Added: llvm/trunk/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll?rev=73760&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll Fri Jun 19 02:00:55 2009
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse,-sse2
+; PR2484
+
+define <4 x float> @f4523(<4 x float> %a,<4 x float> %b) nounwind {
+entry:
+%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4,i32
+5,i32 2,i32 3>
+ret <4 x float> %shuffle
+}