[llvm-commits] [PATCH] Annotate virtual registers with register class in debug output

[Jakob Stoklund Olesen]

I am using this patch when working on the Blackfin backend. Now that  
X86 is gaining a decent set of register classes, it might be generally  
useful.

It prints machine code like this:

	%reg1025GR32<def> = MOV32rr %ESI
	%reg1024GR64<def> = MOV64rr %RDI
	%reg1026GR32_ABCD<def> = MOV32rr %reg1025GR32
	%reg1027GR8_ABCD_H<def> = EXTRACT_SUBREG %reg1026GR32_ABCD, 2
	%reg1028GR32_NOREX<def> = MOVZX32_NOREXrr8 %reg1027GR8_ABCD_H
	%EAX<def> = MOV32rr %reg1028GR32_NOREX
	RET

What do you think? Too much clutter?

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