[llvm-commits] [llvm] r67738 - /llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp

[Chris Lattner]

Author: lattner
Date: Thu Mar 26 00:28:26 2009
New Revision: 67738

URL: http://llvm.org/viewvc/llvm-project?rev=67738&view=rev
Log:
fix some warnings in release-asserts mode.

Modified:
    llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp

Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp?rev=67738&r1=67737&r2=67738&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp Thu Mar 26 00:28:26 2009
@@ -182,8 +182,7 @@
 void MipsInstrInfo::
 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
                     unsigned SrcReg, bool isKill, int FI, 
-                    const TargetRegisterClass *RC) const 
-{
+                    const TargetRegisterClass *RC) const {
   unsigned Opc;
 
   DebugLoc DL = DebugLoc::getUnknownLoc();
@@ -193,11 +192,11 @@
     Opc = Mips::SW;
   else if (RC == Mips::FGR32RegisterClass)
     Opc = Mips::SWC1;
-  else if (RC == Mips::AFGR64RegisterClass)
+  else {
+    assert(RC == Mips::AFGR64RegisterClass);
     Opc = Mips::SDC1;
-  else 
-    assert(0 && "Can't store this register to stack slot");
-
+  }
+  
   BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, false, false, isKill)
           .addImm(0).addFrameIndex(FI);
 }
@@ -211,11 +210,11 @@
     Opc = Mips::SW;
   else if (RC == Mips::FGR32RegisterClass)
     Opc = Mips::SWC1;
-  else if (RC == Mips::AFGR64RegisterClass)
+  else {
+    assert(RC == Mips::AFGR64RegisterClass);
     Opc = Mips::SDC1;
-  else 
-    assert(0 && "Can't store this register");
-
+  }
+  
   DebugLoc DL = DebugLoc::getUnknownLoc();
   MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc))
     .addReg(SrcReg, false, false, isKill);
@@ -235,11 +234,11 @@
     Opc = Mips::LW;
   else if (RC == Mips::FGR32RegisterClass)
     Opc = Mips::LWC1;
-  else if (RC == Mips::AFGR64RegisterClass)
+  else {
+    assert(RC == Mips::AFGR64RegisterClass);
     Opc = Mips::LDC1;
-  else 
-    assert(0 && "Can't load this register from stack slot");
-    
+  }
+  
   DebugLoc DL = DebugLoc::getUnknownLoc();
   if (I != MBB.end()) DL = I->getDebugLoc();
   BuildMI(MBB, I, DL, get(Opc), DestReg).addImm(0).addFrameIndex(FI);
@@ -254,10 +253,10 @@
     Opc = Mips::LW;
   else if (RC == Mips::FGR32RegisterClass)
     Opc = Mips::LWC1;
-  else if (RC == Mips::AFGR64RegisterClass)
+  else {
+    assert(RC == Mips::AFGR64RegisterClass);
     Opc = Mips::LDC1;
-  else 
-    assert(0 && "Can't load this register");
+  }
 
   DebugLoc DL = DebugLoc::getUnknownLoc();
   MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg);
@@ -307,10 +306,10 @@
 
       if (RC == Mips::FGR32RegisterClass) {
         LoadOpc = Mips::LWC1; StoreOpc = Mips::SWC1;
-      } else if (RC == Mips::AFGR64RegisterClass) {
+      } else {
+        assert(RC == Mips::AFGR64RegisterClass);
         LoadOpc = Mips::LDC1; StoreOpc = Mips::SDC1;
-      } else
-        assert(0 && "foldMemoryOperandImpl register unknown");
+      }
 
       if (Ops[0] == 0) {    // COPY -> STORE
         unsigned SrcReg = MI->getOperand(1).getReg();