[llvm-commits] [llvm] r67737 - /llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp

[Chris Lattner]

Author: lattner
Date: Thu Mar 26 00:28:14 2009
New Revision: 67737

URL: http://llvm.org/viewvc/llvm-project?rev=67737&view=rev
Log:
fix an apparently real bug exposed by a warning in -asserts mode.

Modified:
    llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp

Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=67737&r1=67736&r2=67737&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Thu Mar 26 00:28:14 2009
@@ -948,13 +948,14 @@
       // to 32 bits.  Insert an assert[sz]ext to capture this, then 
       // truncate to the right size.
       if (VA.getLocInfo() != CCValAssign::Full) {
-        unsigned Opcode;
+        unsigned Opcode = 0;
         if (VA.getLocInfo() == CCValAssign::SExt)
           Opcode = ISD::AssertSext;
         else if (VA.getLocInfo() == CCValAssign::ZExt)
           Opcode = ISD::AssertZext;
-        ArgValue = DAG.getNode(Opcode, dl, RegVT, ArgValue, 
-                               DAG.getValueType(VA.getValVT()));
+        if (Opcode)
+          ArgValue = DAG.getNode(Opcode, dl, RegVT, ArgValue, 
+                                 DAG.getValueType(VA.getValVT()));
         ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue);
       }