[llvm-commits] [llvm] r48279 - in /llvm/trunk/lib: CodeGen/SelectionDAG/DAGCombiner.cpp Target/X86/X86InstrMMX.td Target/X86/X86InstrSSE.td

[Evan Cheng]

No it doesn't if the transformation happens after legalizer since it's  
up to target lowering to convert a v_set0 to the normalized typw. The  
only way to ensure that would require
1) A target hook to specify the *normalized* v_set0 vector type.
2) getConstant() or dag combiner check if it's a v_set0 and issue the  
v_set0 with right type.

Frankly I think this can only happen in a bugpoint reduced test case  
so I don't think it's worth adding a target hook for. We have too many  
random hooks as it is.

Evan

On Mar 12, 2008, at 11:06 AM, Chris Lattner wrote:

>
> On Mar 12, 2008, at 12:02 AM, Evan Cheng wrote:
>
>> Author: evancheng
>> Date: Wed Mar 12 02:02:50 2008
>> New Revision: 48279
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=48279&view=rev
>> Log:
>> Clean up my own mess.
>> X86 lowering normalize vector 0 to v4i32. However DAGCombine can
>> fold (sub x, x) -> 0 after legalization. It can create a zero vector
>> of a type that's not expected (e.g. v8i16). We don't want to disable
>> the optimization since leaving a (sub x, x) is really bad. Add isel
>> patterns for other types of vector 0 to ensure correctness. It's
>> highly unlikely to happen other than in bugpoint reduced test cases.
>
> Does this make the V_SET0's with the canonical result type?  If so,
> they will be CSEd during isel.
>
> -Chris
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