[llvm-commits] [llvm] r48206 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeDAG.cpp lib/Target/PowerPC/PPCISelLowering.cpp test/CodeGen/PowerPC/int-fp-conv-0.ll test/CodeGen/PowerPC/int-fp-conv-1.ll test/CodeGen/PowerPC/int-fp-conv.ll
Dan Gohman
gohman at apple.com
Mon Mar 10 18:59:03 PDT 2008
Author: djg
Date: Mon Mar 10 20:59:03 2008
New Revision: 48206
URL: http://llvm.org/viewvc/llvm-project?rev=48206&view=rev
Log:
Generalize ExpandIntToFP to handle the case where the operand is legal
and it's the result that requires expansion. This code is a little confusing
because the TargetLoweringInfo tables for [US]INT_TO_FP use the operand type
(the integer type) rather than the result type.
Added:
llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll
- copied unchanged from r48201, llvm/trunk/test/CodeGen/PowerPC/int-fp-conv.ll
llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-1.ll
Removed:
llvm/trunk/test/CodeGen/PowerPC/int-fp-conv.ll
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=48206&r1=48205&r2=48206&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Mar 10 20:59:03 2008
@@ -5366,20 +5366,25 @@
SDOperand SelectionDAGLegalize::
ExpandIntToFP(bool isSigned, MVT::ValueType DestTy, SDOperand Source) {
MVT::ValueType SourceVT = Source.getValueType();
- assert(getTypeAction(SourceVT) == Expand &&
- "This is not an expansion!");
+ bool ExpandSource = getTypeAction(SourceVT) == Expand;
if (!isSigned) {
// The integer value loaded will be incorrectly if the 'sign bit' of the
// incoming integer is set. To handle this, we dynamically test to see if
// it is set, and, if so, add a fudge factor.
- SDOperand Lo, Hi;
- ExpandOp(Source, Lo, Hi);
+ SDOperand Hi;
+ if (ExpandSource) {
+ SDOperand Lo;
+ ExpandOp(Source, Lo, Hi);
+ Source = DAG.getNode(ISD::BUILD_PAIR, SourceVT, Lo, Hi);
+ } else {
+ // The comparison for the sign bit will use the entire operand.
+ Hi = Source;
+ }
// If this is unsigned, and not supported, first perform the conversion to
// signed, then adjust the result if the sign bit is set.
- SDOperand SignedConv = ExpandIntToFP(true, DestTy,
- DAG.getNode(ISD::BUILD_PAIR, SourceVT, Lo, Hi));
+ SDOperand SignedConv = ExpandIntToFP(true, DestTy, Source);
SDOperand SignSet = DAG.getSetCC(TLI.getSetCCResultType(Hi), Hi,
DAG.getConstant(0, Hi.getValueType()),
@@ -5437,17 +5442,23 @@
// Expand the source, then glue it back together for the call. We must expand
// the source in case it is shared (this pass of legalize must traverse it).
- SDOperand SrcLo, SrcHi;
- ExpandOp(Source, SrcLo, SrcHi);
- Source = DAG.getNode(ISD::BUILD_PAIR, SourceVT, SrcLo, SrcHi);
+ if (ExpandSource) {
+ SDOperand SrcLo, SrcHi;
+ ExpandOp(Source, SrcLo, SrcHi);
+ Source = DAG.getNode(ISD::BUILD_PAIR, SourceVT, SrcLo, SrcHi);
+ }
RTLIB::Libcall LC;
if (SourceVT == MVT::i64) {
if (DestTy == MVT::f32)
LC = RTLIB::SINTTOFP_I64_F32;
- else {
- assert(DestTy == MVT::f64 && "Unknown fp value type!");
+ else if (DestTy == MVT::f64)
LC = RTLIB::SINTTOFP_I64_F64;
+ else if (DestTy == MVT::f80)
+ LC = RTLIB::SINTTOFP_I64_F80;
+ else {
+ assert(DestTy == MVT::ppcf128 && "Unknown fp value type!");
+ LC = RTLIB::SINTTOFP_I64_PPCF128;
}
} else if (SourceVT == MVT::i128) {
if (DestTy == MVT::f32)
Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=48206&r1=48205&r2=48206&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Mon Mar 10 20:59:03 2008
@@ -2380,6 +2380,10 @@
}
SDOperand PPCTargetLowering::LowerSINT_TO_FP(SDOperand Op, SelectionDAG &DAG) {
+ // Don't handle ppc_fp128 here; let it be lowered to a libcall.
+ if (Op.getValueType() != MVT::f32 && Op.getValueType() != MVT::f64)
+ return SDOperand();
+
if (Op.getOperand(0).getValueType() == MVT::i64) {
SDOperand Bits = DAG.getNode(ISD::BIT_CONVERT, MVT::f64, Op.getOperand(0));
SDOperand FP = DAG.getNode(PPCISD::FCFID, MVT::f64, Bits);
Added: llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-1.ll?rev=48206&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-1.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-1.ll Mon Mar 10 20:59:03 2008
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc -march=ppc64 | grep __floatditf
+
+define i64 @__fixunstfdi(ppc_fp128 %a) nounwind {
+entry:
+ %tmp1213 = uitofp i64 0 to ppc_fp128 ; <ppc_fp128> [#uses=1]
+ %tmp15 = sub ppc_fp128 %a, %tmp1213 ; <ppc_fp128> [#uses=1]
+ %tmp2829 = fptoui ppc_fp128 %tmp15 to i32 ; <i32> [#uses=1]
+ %tmp282930 = zext i32 %tmp2829 to i64 ; <i64> [#uses=1]
+ %tmp32 = add i64 %tmp282930, 0 ; <i64> [#uses=1]
+ ret i64 %tmp32
+}
Removed: llvm/trunk/test/CodeGen/PowerPC/int-fp-conv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/int-fp-conv.ll?rev=48205&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/int-fp-conv.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/int-fp-conv.ll (removed)
@@ -1,17 +0,0 @@
-; RUN: llvm-as < %s | llc -march=ppc64 > %t
-; RUN: grep __floattitf %t
-; RUN: grep __fixunstfti %t
-
-target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
-target triple = "powerpc64-apple-darwin9.2.0"
-
-define ppc_fp128 @foo(i128 %a) nounwind {
-entry:
- %tmp2829 = uitofp i128 %a to ppc_fp128 ; <i64> [#uses=1]
- ret ppc_fp128 %tmp2829
-}
-define i128 @boo(ppc_fp128 %a) nounwind {
-entry:
- %tmp2829 = fptoui ppc_fp128 %a to i128 ; <i64> [#uses=1]
- ret i128 %tmp2829
-}
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