[llvm-commits] [llvm] r47454 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll
Chris Lattner
sabre at nondot.org
Thu Feb 21 11:43:13 PST 2008
Author: lattner
Date: Thu Feb 21 13:43:13 2008
New Revision: 47454
URL: http://llvm.org/viewvc/llvm-project?rev=47454&view=rev
Log:
Treat clobber operands like early clobbers: if we have
any, we force sdisel to do all regalloc for an asm. This
leads to gross but correct codegen.
This fixes the rest of PR2078.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
llvm/trunk/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=47454&r1=47453&r2=47454&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Thu Feb 21 13:43:13 2008
@@ -3467,6 +3467,17 @@
}
+/// GetRegistersForValue - Assign registers (virtual or physical) for the
+/// specified operand. We prefer to assign virtual registers, to allow the
+/// register allocator handle the assignment process. However, if the asm uses
+/// features that we can't model on machineinstrs, we have SDISel do the
+/// allocation. This produces generally horrible, but correct, code.
+///
+/// OpInfo describes the operand.
+/// HasEarlyClobber is true if there are any early clobber constraints (=&r)
+/// or any explicitly clobbered registers.
+/// Input and OutputRegs are the set of already allocated physical registers.
+///
void SelectionDAGLowering::
GetRegistersForValue(AsmOperandInfo &OpInfo, bool HasEarlyClobber,
std::set<unsigned> &OutputRegs,
@@ -3723,6 +3734,11 @@
// Keep track of whether we see an earlyclobber.
SawEarlyClobber |= OpInfo.isEarlyClobber;
+ // If we see a clobber of a register, it is an early clobber.
+ if (OpInfo.Type == InlineAsm::isClobber &&
+ OpInfo.ConstraintType == TargetLowering::C_Register)
+ SawEarlyClobber = true;
+
// If this is a memory input, and if the operand is not indirect, do what we
// need to to provide an address for the memory input.
if (OpInfo.ConstraintType == TargetLowering::C_Memory &&
Modified: llvm/trunk/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll?rev=47454&r1=47453&r2=47454&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll Thu Feb 21 13:43:13 2008
@@ -1,4 +1,5 @@
-; RUN: llvm-as < %s | llc | grep {%ecx %ecx}
+; RUN: llvm-as < %s | llc | grep {a: %ecx %ecx}
+; RUN: llvm-as < %s | llc | grep {b: %ecx %edx %ecx}
; PR2078
; The clobber list says that "ax" is clobbered. Make sure that eax isn't
; allocated to the input/output register.
@@ -9,7 +10,15 @@
define void @test() nounwind {
entry:
%tmp = load i32* @pixels, align 4 ; <i32> [#uses=1]
- %tmp1 = tail call i32 asm sideeffect "$0 $1", "=r,0,~{dirflag},~{fpsr},~{flags},~{ax}"( i32 %tmp ) nounwind ; <i32> [#uses=1]
+ %tmp1 = tail call i32 asm sideeffect "a: $0 $1", "=r,0,~{dirflag},~{fpsr},~{flags},~{ax}"( i32 %tmp ) nounwind ; <i32> [#uses=1]
store i32 %tmp1, i32* @pixels, align 4
ret void
}
+
+define void @test2(i16* %block, i8* %pixels, i32 %line_size) nounwind {
+entry:
+ %tmp1 = getelementptr i16* %block, i32 64 ; <i16*> [#uses=1]
+ %tmp3 = tail call i8* asm sideeffect "b: $0 $1 $2", "=r,r,0,~{dirflag},~{fpsr},~{flags},~{ax}"( i16* %tmp1, i8* %pixels ) nounwind ; <i8*> [#uses=0]
+ ret void
+}
+
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