[llvm-commits] Patch: JIT support for ARM

[Evan Cheng]

Very nice!


+def NoneFormat  : Format<0>;  def Pseudo    : Format<1>;
+def Multiply    : Format<2>;  def Branch    : Format<3>;

Some naming suggestions. NoneFormat -> Pseudo, Multiply ->  
MultiplyFrm (or MulFrm).

+class AI<dag oops, dag iops, Format f, string opc, string asm,  
list<dag> pattern>
+  : I<oops, iops, AddrModeNone, Size4Bytes, IndexModeNone, f, opc,  
asm,"",pattern>;

Please watch out for "80 col violations" (tm)! :-)

+static const unsigned InstBits[] = {
+  0,
+  0,
+  0,
+  0,
+  0,
+  0XE2B00000,
+  0XE0B00000,
+  0XE0B00000,
+  0XE2900000,

This is impossible to maintain. Please move opcode bits into .td  
files. That is, please add it to each instruction definition:
    // FIXME: Set all opcodes to 0 for now.
   : InstARM<0, am, sz, im, cstr> {

Thanks,

Evan


On Jul 30, 2007, at 10:51 AM, Raul Fernandes Herbster wrote:

> JIT support for ARM is now generating machine code (Thumb and VFP  
> are not supported). Relocation has not been implemented yet. Next  
> patch must provide such feature. Please, send me any feedback.
>
> Thanks in advance, Raul.
>
> -- 
> Raul Fernandes Herbster
> Embedded and Pervasive Computing Laboratory - embedded.dee.ufcg.edu.br
> Electrical Engineering Department - DEE - www.dee.ufcg.edu.br
> Electrical Engineering and Informatics Center - CEEI
> Federal University of Campina Grande - UFCG - www.ufcg.edu.br
> Caixa Postal 10105
> 58109-970 Campina Grande - PB - Brasil
> <patch>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits

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