[llvm-commits] [llvm] r37892 - /llvm/trunk/lib/Target/Target.td

[Evan Cheng]

On Jul 5, 2007, at 9:09 AM, Chris Lattner wrote:

> Hi Evan,
>
>> +/// execute". If isOutput is true, then this is output operand.
>
> I don't get it.  What is an "output predicate"?  I see you use this
> in the arm backend:
>
> +// Conditional code result for cmp, etc.
> +//
> +def cc_out : PredicateResultOperand<OtherVT, (ops CCR), (ops (i32
> zero_reg))> {
>     let PrintMethod = "printPredicateOperand";
>   }
>
> why not just have cmp have an implicit def of the flags?  It seems
> very very strange to me to have a "predicate" that is an output...

Let's first  talk about why this is needed. For ARM, almost every  
instruction has a 's' bit. When the bit is set, the instruction will  
modify the CPSR register. So we'll model it as a PredicateOperand  
whose default value is zero_reg. This allows us to toggle the  
instruction by changing its register to CPSR (i.e. the 's' variant)  
without having a separate opcode.

This is exactly the same mechanism as the input PredicateOperand.  
While I don't like the name PredicateOperand, I don't see the need to  
add something new.

>
>
>>  /// If isImmutable
>> +/// is true, then the operand should not change after instruction
>> selection.
>
> What does isImmutable mean?  Can you give an example?   Is this a
> property of the target or a property of the codegen algorithms?

Conditional branches, conditional moves, etc. all have a  
PredicateOperand whose value is set at isel time. These instructions  
are not predicable though so it's important to differentiate these  
from the "normal" PredicateOperands.

Evan


>
> -Chris
>
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