[llvm-commits] ARM problem
Lauro Ramos Venancio
lauro.venancio at gmail.com
Thu Jun 28 10:06:43 PDT 2007
Hi Dan,
Do you already have the final fix for this problem? It caused a lot of
fails on nightly test
(http://llvm.org/nightlytest/test.php?machine=142&night=3088).
Lauro
2007/6/27, Dan Gohman <djg at cray.com>:
> Hi Lauro,
>
> This was caused by my fix for PR1529.
>
> I'm currently considering the following patch, which fixes your attached
> test case:
>
> Index: lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
> ===================================================================
> RCS file: /var/cvs/llvm/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp,v
> retrieving revision 1.470
> diff -u -r1.470 SelectionDAGISel.cpp
> --- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
> +++ lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
> @@ -312,7 +312,9 @@
> MVT::ValueType ElementVT;
> NumRegisters = TLI.getVectorTypeBreakdown(VT, ElementVT, RegisterVT);
> } else {
> - RegisterVT = TLI.getTypeToTransformTo(VT);
> + RegisterVT = VT;
> + while (!TLI.isTypeLegal(RegisterVT))
> + RegisterVT = TLI.getTypeToTransformTo(RegisterVT);
> NumRegisters = TLI.getNumRegisters(VT);
> }
>
>
> I'm looking to see if I can find a cleaner way to solve this.
>
> Dan
>
> --
> Dan Gohman, Cray Inc.
>
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