[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocBigBlock.cpp

[Duraid Madina]

Changes in directory llvm/lib/CodeGen:

RegAllocBigBlock.cpp updated: 1.6 -> 1.7
---
Log message:

ok, this is something of a dirty hack, but it seems to work. (fixes e.g.
the SPASS miscompilation)



---
Diffs of the changes:  (+16 -2)

 RegAllocBigBlock.cpp |   18 ++++++++++++++++--
 1 files changed, 16 insertions(+), 2 deletions(-)


Index: llvm/lib/CodeGen/RegAllocBigBlock.cpp
diff -u llvm/lib/CodeGen/RegAllocBigBlock.cpp:1.6 llvm/lib/CodeGen/RegAllocBigBlock.cpp:1.7
--- llvm/lib/CodeGen/RegAllocBigBlock.cpp:1.6	Wed Jun 27 03:31:07 2007
+++ llvm/lib/CodeGen/RegAllocBigBlock.cpp	Wed Jun 27 04:01:14 2007
@@ -459,9 +459,23 @@
         }
       }
     }
+
+    if(PhysReg == 0) { // ok, now we're desperate. We couldn't choose
+                       // a register to spill by looking through the
+                       // read timetable, so now we just spill the
+                       // first allocatable register we find.
+                       
+      // for all physical regs in the RC,
+      for(TargetRegisterClass::iterator pReg = RC->begin(); 
+                                        pReg != RC->end();  ++pReg) {
+        // if we find a register we can spill
+        if(PhysRegsUsed[*pReg]>=-1)
+          PhysReg = *pReg; // choose it to be spilled
+      }
+    }
     
-    assert(PhysReg && "couldn't grab a register from the table?");
-    // TODO: assert that RC->contains(PhysReg) / handle aliased registers
+    assert(PhysReg && "couldn't choose a register to spill :( ");
+    // TODO: assert that RC->contains(PhysReg) / handle aliased registers?
 
     // since we needed to look in the table we need to spill this register.
     spillPhysReg(MBB, I, PhysReg);