[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocBigBlock.cpp

[Duraid Madina]

Changes in directory llvm/lib/CodeGen:

RegAllocBigBlock.cpp updated: 1.5 -> 1.6
---
Log message:

ok, this much doesn't seem to bork anything



---
Diffs of the changes:  (+48 -25)

 RegAllocBigBlock.cpp |   73 +++++++++++++++++++++++++++++++++------------------
 1 files changed, 48 insertions(+), 25 deletions(-)


Index: llvm/lib/CodeGen/RegAllocBigBlock.cpp
diff -u llvm/lib/CodeGen/RegAllocBigBlock.cpp:1.5 llvm/lib/CodeGen/RegAllocBigBlock.cpp:1.6
--- llvm/lib/CodeGen/RegAllocBigBlock.cpp:1.5	Wed Jun 27 03:11:59 2007
+++ llvm/lib/CodeGen/RegAllocBigBlock.cpp	Wed Jun 27 03:31:07 2007
@@ -357,18 +357,7 @@
          *AliasSet; ++AliasSet)
       if (PhysRegsUsed[*AliasSet] != -1 &&     // Spill aliased register.
           PhysRegsUsed[*AliasSet] != -2)       // If allocatable.
-        if (PhysRegsUsed[*AliasSet] == 0) {
-          // This must have been a dead def due to something like this:
-          // %EAX :=
-          //      := op %AL
-          // No more use of %EAX, %AH, etc.
-          // %EAX isn't dead upon definition, but %AH is. However %AH isn't
-          // an operand of definition MI so it's not marked as such.
-          DOUT << "  Register " << RegInfo->getName(*AliasSet)
-               << " [%reg" << *AliasSet
-               << "] is never used, removing it frame live list\n";
-          removePhysReg(*AliasSet);
-        } else
+        if (PhysRegsUsed[*AliasSet])
           spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
   }
 }
@@ -582,6 +571,30 @@
   }
 }
 
+/// isReadModWriteImplicitKill - True if this is an implicit kill for a
+/// read/mod/write register, i.e. update partial register.
+static bool isReadModWriteImplicitKill(MachineInstr *MI, unsigned Reg) {
+  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
+    MachineOperand& MO = MI->getOperand(i);
+    if (MO.isRegister() && MO.getReg() == Reg && MO.isImplicit() &&
+        MO.isDef() && !MO.isDead())
+      return true;
+  }
+  return false;
+}
+
+/// isReadModWriteImplicitDef - True if this is an implicit def for a
+/// read/mod/write register, i.e. update partial register.
+static bool isReadModWriteImplicitDef(MachineInstr *MI, unsigned Reg) {
+  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
+    MachineOperand& MO = MI->getOperand(i);
+    if (MO.isRegister() && MO.getReg() == Reg && MO.isImplicit() &&
+        !MO.isDef() && MO.isKill())
+      return true;
+  }
+  return false;
+}
+
 
 void RABigBlock::AllocateBasicBlock(MachineBasicBlock &MBB) {
   // loop over each instruction
@@ -599,7 +612,7 @@
       unsigned Reg = I->first;
       MF->setPhysRegUsed(Reg);
       PhysRegsUsed[Reg] = 0;            // It is free and reserved now
-      for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
+      for (const unsigned *AliasSet = RegInfo->getSubRegisters(Reg);
            *AliasSet; ++AliasSet) {
         if (PhysRegsUsed[*AliasSet] != -2) {
           PhysRegsUsed[*AliasSet] = 0;  // It is free and reserved now
@@ -626,8 +639,15 @@
     SmallVector<unsigned, 8> Kills;
     for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
       MachineOperand& MO = MI->getOperand(i);
-      if (MO.isRegister() && MO.isKill())
-        Kills.push_back(MO.getReg());
+      if (MO.isRegister() && MO.isKill()) {
+        if (!MO.isImplicit())
+          Kills.push_back(MO.getReg());
+        else if (!isReadModWriteImplicitKill(MI, MO.getReg()))
+          // These are extra physical register kills when a sub-register
+          // is defined (def of a sub-register is a read/mod/write of the
+          // larger registers). Ignore.
+          Kills.push_back(MO.getReg());
+      }
     }
 
     // Get the used operands into registers.  This has the potential to spill
@@ -660,13 +680,16 @@
       } else if (PhysRegsUsed[PhysReg] == -2) {
         // Unallocatable register dead, ignore.
         continue;
+      } else {
+        assert(!PhysRegsUsed[PhysReg] || PhysRegsUsed[PhysReg] == -1 &&
+               "Silently clearing a virtual register?");
       }
 
       if (PhysReg) {
         DOUT << "  Last use of " << RegInfo->getName(PhysReg)
              << "[%reg" << VirtReg <<"], removing it from live set\n";
         removePhysReg(PhysReg);
-        for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
+        for (const unsigned *AliasSet = RegInfo->getSubRegisters(PhysReg);
              *AliasSet; ++AliasSet) {
           if (PhysRegsUsed[*AliasSet] != -2) {
             DOUT  << "  Last use of "
@@ -686,11 +709,15 @@
           MRegisterInfo::isPhysicalRegister(MO.getReg())) {
         unsigned Reg = MO.getReg();
         if (PhysRegsUsed[Reg] == -2) continue;  // Something like ESP.
-            
+        // These are extra physical register defs when a sub-register
+        // is defined (def of a sub-register is a read/mod/write of the
+        // larger registers). Ignore.
+        if (isReadModWriteImplicitDef(MI, MO.getReg())) continue;
+
         MF->setPhysRegUsed(Reg);
         spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in reg
         PhysRegsUsed[Reg] = 0;            // It is free and reserved now
-        for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
+        for (const unsigned *AliasSet = RegInfo->getSubRegisters(Reg);
              *AliasSet; ++AliasSet) {
           if (PhysRegsUsed[*AliasSet] != -2) {
             PhysRegsUsed[*AliasSet] = 0;  // It is free and reserved now
@@ -705,19 +732,15 @@
       for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
            *ImplicitDefs; ++ImplicitDefs) {
         unsigned Reg = *ImplicitDefs;
-        bool IsNonAllocatable = PhysRegsUsed[Reg] == -2;
-        if (!IsNonAllocatable) {
+        if (PhysRegsUsed[Reg] != -2) {
           spillPhysReg(MBB, MI, Reg, true);
           PhysRegsUsed[Reg] = 0;            // It is free and reserved now
         }
         MF->setPhysRegUsed(Reg);
-
-        for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
+        for (const unsigned *AliasSet = RegInfo->getSubRegisters(Reg);
              *AliasSet; ++AliasSet) {
           if (PhysRegsUsed[*AliasSet] != -2) {
-            if (!IsNonAllocatable) {
-              PhysRegsUsed[*AliasSet] = 0;  // It is free and reserved now
-            }
+            PhysRegsUsed[*AliasSet] = 0;  // It is free and reserved now
             MF->setPhysRegUsed(*AliasSet);
           }
         }