[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp

[Evan Cheng]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

ScheduleDAGRRList.cpp updated: 1.27 -> 1.28
---
Log message:

Try schedule def + use closer whne Sethi-Ullman numbers are the same.
e.g.
t1 = op t2, c1
t3 = op t4, c2
and the following instructions are both ready.
t2 = op c3
t4 = op c4

Then schedule t2 = op first.
i.e.
t4 = op c4
t2 = op c3
t1 = op t2, c1
t3 = op t4, c2

This creates more short live intervals which work better with the register
allocator.


---
Diffs of the changes:  (+38 -6)

 ScheduleDAGRRList.cpp |   44 ++++++++++++++++++++++++++++++++++++++------
 1 files changed, 38 insertions(+), 6 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp:1.27 llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp:1.28
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp:1.27	Fri Feb  2 19:34:13 2007
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp	Tue Mar 13 18:25:11 2007
@@ -576,6 +576,15 @@
   };
 }
 
+static unsigned closestSucc(const SUnit *SU) {
+  unsigned MaxCycle = 0;
+  for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end();
+       I != E; ++I)
+    if (I->first->Cycle > MaxCycle)
+      MaxCycle = I->first->Cycle;
+  return MaxCycle;
+}
+
 // Bottom up
 bool bu_ls_rr_sort::operator()(const SUnit *left, const SUnit *right) const {
   bool LIsTarget = left->Node->isTargetOpcode();
@@ -596,15 +605,38 @@
   unsigned RPriority = SPQ->getNodePriority(right);
   if (LPriority > RPriority)
     return true;
-  else if (LPriority == RPriority)
-    if (left->Height > right->Height)
+  else if (LPriority == RPriority) {
+    // Try schedule def + use closer whne Sethi-Ullman numbers are the same.
+    // e.g.
+    // t1 = op t2, c1
+    // t3 = op t4, c2
+    //
+    // and the following instructions are both ready.
+    // t2 = op c3
+    // t4 = op c4
+    //
+    // Then schedule t2 = op first.
+    // i.e.
+    // t4 = op c4
+    // t2 = op c3
+    // t1 = op t2, c1
+    // t3 = op t4, c2
+    //
+    // This creates more short live intervals.
+    unsigned LDist = closestSucc(left);
+    unsigned RDist = closestSucc(right);
+    if (LDist < RDist)
       return true;
-    else if (left->Height == right->Height)
-      if (left->Depth < right->Depth)
+    else if (LDist == RDist)
+      if (left->Height > right->Height)
         return true;
-      else if (left->Depth == right->Depth)
-        if (left->CycleBound > right->CycleBound) 
+      else if (left->Height == right->Height)
+        if (left->Depth < right->Depth)
           return true;
+        else if (left->Depth == right->Depth)
+          if (left->CycleBound > right->CycleBound) 
+            return true;
+  }
   return false;
 }