[llvm-commits] [SignlessTypes] CVS: llvm/lib/Bytecode/Reader/Reader.cpp

[Zhou Sheng]

Changes in directory llvm/lib/Bytecode/Reader:

Reader.cpp updated: 1.198.2.6 -> 1.198.2.7
---
Log message:



---
Diffs of the changes:  (+15 -6)

 Reader.cpp |   21 +++++++++++++++------
 1 files changed, 15 insertions(+), 6 deletions(-)


Index: llvm/lib/Bytecode/Reader/Reader.cpp
diff -u llvm/lib/Bytecode/Reader/Reader.cpp:1.198.2.6 llvm/lib/Bytecode/Reader/Reader.cpp:1.198.2.7
--- llvm/lib/Bytecode/Reader/Reader.cpp:1.198.2.6	Sun Oct 22 18:28:40 2006
+++ llvm/lib/Bytecode/Reader/Reader.cpp	Mon Oct 23 13:13:26 2006
@@ -643,7 +643,15 @@
       break;
 
     case 11: // Rem
-        Opcode = Instruction::Rem;
+      // As with "Div", make the signed/unsigned or floating point 
+      // Rem instruction choice based
+      // on the type of the operands.
+      if (iType == 10 || iType == 11)
+        Opcode = Instruction::FRem;
+      else if (iType >= 2 && iType <= 9 && iType % 2 != 0)
+        Opcode = Instruction::SRem;
+      else
+        Opcode = Instruction::URem;
       break;
     case 12: // And
       Opcode = Instruction::And;
@@ -1653,14 +1661,15 @@
       break;
 
     case 11: // Rem
-      // As with "Div", make the signed/unsigned Rem instruction choice based
-      // on the type of the instruction.
+      // As with "Div", make the signed/unsigned or floating point
+      // Rem instruction choice based
+      // on the type of the operands.
       if (ArgVec[0]->getType()->isFloatingPoint())
-        Opcode = Instruction::Rem;
+        Opcode = Instruction::FRem;
       else if (ArgVec[0]->getType()->isSigned())
-        Opcode = Instruction::Rem;
+        Opcode = Instruction::SRem;
       else
-        Opcode = Instruction::Rem;
+        Opcode = Instruction::URem;
       break;
 
     case 12: // And