[llvm-commits] CVS: llvm/lib/Target/ARM/ARMInstrInfo.td ARMRegisterInfo.cpp
Rafael Espindola
rafael.espindola at gmail.com
Fri Jul 21 05:26:43 PDT 2006
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.9 -> 1.10
ARMRegisterInfo.cpp updated: 1.8 -> 1.9
---
Log message:
implemented sub
correctly update the stack pointer in the prologue and epilogue
---
Diffs of the changes: (+12 -3)
ARMInstrInfo.td | 4 ++++
ARMRegisterInfo.cpp | 11 ++++++++---
2 files changed, 12 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.9 llvm/lib/Target/ARM/ARMInstrInfo.td:1.10
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.9 Tue Jul 18 12:00:30 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Fri Jul 21 07:26:16 2006
@@ -76,3 +76,7 @@
def addri : InstARM<(ops IntRegs:$dst, IntRegs:$a, i32imm:$b),
"add $dst, $a, $b",
[(set IntRegs:$dst, (add IntRegs:$a, imm:$b))]>;
+
+def subri : InstARM<(ops IntRegs:$dst, IntRegs:$a, i32imm:$b),
+ "sub $dst, $a, $b",
+ [(set IntRegs:$dst, (sub IntRegs:$a, imm:$b))]>;
Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.8 llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.9
--- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.8 Tue Jul 18 12:00:30 2006
+++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Fri Jul 21 07:26:16 2006
@@ -117,14 +117,17 @@
void ARMRegisterInfo::emitPrologue(MachineFunction &MF) const {
MachineBasicBlock &MBB = MF.front();
+ MachineBasicBlock::iterator MBBI = MBB.begin();
MachineFrameInfo *MFI = MF.getFrameInfo();
int NumBytes = (int) MFI->getStackSize();
//hack
assert(NumBytes == 0);
- //add a sp = sp - 4
- BuildMI(MBB, MBB.begin(), ARM::str, 1, ARM::R14).addReg(ARM::R13);
+ //sub sp, sp, #4
+ BuildMI(MBB, MBBI, ARM::subri, 2, ARM::R13).addReg(ARM::R13).addImm(4);
+ //str lr, [sp]
+ BuildMI(MBB, MBBI, ARM::str, 1, ARM::R14).addReg(ARM::R13);
}
void ARMRegisterInfo::emitEpilogue(MachineFunction &MF,
@@ -138,8 +141,10 @@
//hack
assert(NumBytes == 0);
+ //ldr lr, [sp]
BuildMI(MBB, MBBI, ARM::ldr, 2, ARM::R14).addImm(0).addReg(ARM::R13);
- //add a sp = sp + 4
+ //add sp, sp, #4
+ BuildMI(MBB, MBBI, ARM::addri, 2, ARM::R13).addReg(ARM::R13).addImm(4);
}
unsigned ARMRegisterInfo::getRARegister() const {
More information about the llvm-commits
mailing list