[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC.td PPCRegisterInfo.cpp PPCRegisterInfo.h

Evan Cheng evan.cheng at apple.com
Wed May 17 17:12:38 PDT 2006



Changes in directory llvm/lib/Target/PowerPC:

PPC.td updated: 1.16 -> 1.17
PPCRegisterInfo.cpp updated: 1.66 -> 1.67
PPCRegisterInfo.h updated: 1.14 -> 1.15
---
Log message:

getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.

---
Diffs of the changes:  (+71 -9)

 PPC.td              |    9 ------
 PPCRegisterInfo.cpp |   67 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 PPCRegisterInfo.h   |    4 +++
 3 files changed, 71 insertions(+), 9 deletions(-)


Index: llvm/lib/Target/PowerPC/PPC.td
diff -u llvm/lib/Target/PowerPC/PPC.td:1.16 llvm/lib/Target/PowerPC/PPC.td:1.17
--- llvm/lib/Target/PowerPC/PPC.td:1.16	Wed May 17 16:19:38 2006
+++ llvm/lib/Target/PowerPC/PPC.td	Wed May 17 19:12:25 2006
@@ -83,13 +83,4 @@
 def PPC : Target {
   // Information about the instructions.
   let InstructionSet = PPCInstrInfo;
-
-
-  // According to the Mach-O Runtime ABI, these regs are nonvolatile across
-  // calls
-  let CalleeSavedRegisters = [R1, R13, R14, R15, R16, R17, R18, R19,
-    R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, R30, R31, F14, F15,
-    F16, F17, F18, F19, F20, F21, F22, F23, F24, F25, F26, F27, F28, F29,
-    F30, F31, CR2, CR3, CR4, V20, V21, V22, V23, V24, V25, V26, V27, V28,
-    V29, V30, V31, LR];
 }


Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.66 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.67
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.66	Wed May 10 01:38:32 2006
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp	Wed May 17 19:12:25 2006
@@ -182,6 +182,73 @@
   }
 }
 
+const unsigned* PPCRegisterInfo::getCalleeSaveRegs() const {
+  static const unsigned CalleeSaveRegs[] = {
+    PPC::R1, PPC::R13,
+    PPC::R14, PPC::R15,
+    PPC::R16, PPC::R17,
+    PPC::R18, PPC::R19,
+    PPC::R20, PPC::R21,
+    PPC::R22, PPC::R23,
+    PPC::R24, PPC::R25,
+    PPC::R26, PPC::R27,
+    PPC::R28, PPC::R29,
+    PPC::R30, PPC::R31,
+    PPC::F14, PPC::F15,
+    PPC::F16, PPC::F17,
+    PPC::F18, PPC::F19,
+    PPC::F20, PPC::F21,
+    PPC::F22, PPC::F23,
+    PPC::F24, PPC::F25,
+    PPC::F26, PPC::F27,
+    PPC::F28, PPC::F29,
+    PPC::F30, PPC::F31,
+    PPC::CR2, PPC::CR3,
+    PPC::CR4, PPC::V20,
+    PPC::V21, PPC::V22,
+    PPC::V23, PPC::V24,
+    PPC::V25, PPC::V26,
+    PPC::V27, PPC::V28,
+    PPC::V29, PPC::V30,
+    PPC::V31, PPC::LR,  0
+  };
+  return CalleeSaveRegs;
+}
+
+const TargetRegisterClass* const*
+PPCRegisterInfo::getCalleeSaveRegClasses() const {
+  static const TargetRegisterClass * const CalleeSaveRegClasses[] = {
+    &PPC::GPRCRegClass, &PPC::GPRCRegClass,
+    &PPC::GPRCRegClass, &PPC::GPRCRegClass,
+    &PPC::GPRCRegClass, &PPC::GPRCRegClass,
+    &PPC::GPRCRegClass, &PPC::GPRCRegClass,
+    &PPC::GPRCRegClass, &PPC::GPRCRegClass,
+    &PPC::GPRCRegClass, &PPC::GPRCRegClass,
+    &PPC::GPRCRegClass, &PPC::GPRCRegClass,
+    &PPC::GPRCRegClass, &PPC::GPRCRegClass,
+    &PPC::GPRCRegClass, &PPC::GPRCRegClass,
+    &PPC::GPRCRegClass, &PPC::GPRCRegClass,
+    &PPC::F8RCRegClass, &PPC::F8RCRegClass,
+    &PPC::F8RCRegClass, &PPC::F8RCRegClass,
+    &PPC::F8RCRegClass, &PPC::F8RCRegClass,
+    &PPC::F8RCRegClass, &PPC::F8RCRegClass,
+    &PPC::F8RCRegClass, &PPC::F8RCRegClass,
+    &PPC::F8RCRegClass, &PPC::F8RCRegClass,
+    &PPC::F8RCRegClass, &PPC::F8RCRegClass,
+    &PPC::F8RCRegClass, &PPC::F8RCRegClass,
+    &PPC::F8RCRegClass, &PPC::F8RCRegClass,
+    &PPC::CRRCRegClass, &PPC::CRRCRegClass,
+    &PPC::CRRCRegClass, &PPC::VRRCRegClass,
+    &PPC::VRRCRegClass, &PPC::VRRCRegClass,
+    &PPC::VRRCRegClass, &PPC::VRRCRegClass,
+    &PPC::VRRCRegClass, &PPC::VRRCRegClass,
+    &PPC::VRRCRegClass, &PPC::VRRCRegClass,
+    &PPC::VRRCRegClass, &PPC::VRRCRegClass,
+    &PPC::VRRCRegClass, &PPC::GPRCRegClass,  0
+  };
+  return CalleeSaveRegClasses;
+}
+
 /// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into
 /// copy instructions, turning them into load/store instructions.
 MachineInstr *PPCRegisterInfo::foldMemoryOperand(MachineInstr *MI,


Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.h
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.14 llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.15
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.14	Mon Apr 17 16:07:20 2006
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.h	Wed May 17 19:12:25 2006
@@ -51,6 +51,10 @@
   virtual MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum,
                                           int FrameIndex) const;
   
+  const unsigned *getCalleeSaveRegs() const;
+
+  const TargetRegisterClass* const* getCalleeSaveRegClasses() const;
+
   void eliminateCallFramePseudoInstr(MachineFunction &MF,
                                      MachineBasicBlock &MBB,
                                      MachineBasicBlock::iterator I) const;






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