[llvm-commits] CVS: llvm/lib/Target/IA64/IA64.td IA64RegisterInfo.cpp IA64RegisterInfo.h

[Evan Cheng]

Changes in directory llvm/lib/Target/IA64:

IA64.td updated: 1.8 -> 1.9
IA64RegisterInfo.cpp updated: 1.19 -> 1.20
IA64RegisterInfo.h updated: 1.7 -> 1.8
---
Log message:

getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.

---
Diffs of the changes:  (+19 -60)

 IA64.td              |   60 ---------------------------------------------------
 IA64RegisterInfo.cpp |   15 ++++++++++++
 IA64RegisterInfo.h   |    4 +++
 3 files changed, 19 insertions(+), 60 deletions(-)


Index: llvm/lib/Target/IA64/IA64.td
diff -u llvm/lib/Target/IA64/IA64.td:1.8 llvm/lib/Target/IA64/IA64.td:1.9
--- llvm/lib/Target/IA64/IA64.td:1.8	Wed May 17 16:18:48 2006
+++ llvm/lib/Target/IA64/IA64.td	Wed May 17 19:12:11 2006
@@ -31,66 +31,6 @@
 def IA64InstrInfo : InstrInfo { }
 
 def IA64 : Target {
-  // The following registers are always saved across calls:
-  let CalleeSavedRegisters = 
-  
-  //'preserved' GRs:
-  
-  [
-    r5 // the 'frame pointer' (base pointer) reg
-
-    // We never generate references to these regs, so we don't need to declare
-    // that they are saved.  In fact, we could just remove them entirely.
-    //r4, r6, r7,
-  
-  //'special' GRs:
-
-//  r1, // global data pointer (GP)  - XXX NOT callee saved, we do it ourselves
-//  r12, // memory stack pointer (SP)- XXX NOT callee saved, we do it ourselves
-//  rp, // return branch register (rp/b0) - we do this ourselves
-  // **** r13 (thread pointer) we do not touch, ever. it's not here. ****//
-  
-  //'stacked' GRs the RSE takes care of, we don't worry about
-/* We don't want PEI::calculateCallerSavedRegisters to worry about them,
-  since the RSE takes care of them (and we determinethe appropriate
-  'alloc' instructions and save/restore ar.pfs ourselves, in instruction
-  selection)
-
-**************************************************************************  
-*  r32, r33, r34, r35,
-*  r36, r37, r38, r39, r40, r41, r42, r43, r44, r45, r46, r47,
-*  r48, r49, r50, r51, r52, r53, r54, r55, r56, r57, r58, r59,
-*  r60, r61, r62, r63, r64, r65, r66, r67, r68, r69, r70, r71,
-*  r72, r73, r74, r75, r76, r77, r78, r79, r80, r81, r82, r83,
-*  r84, r85, r86, r87, r88, r89, r90, r91, r92, r93, r94, r95,
-*  r96, r97, r98, r99, r100, r101, r102, r103, r104, r105, r106, r107,
-*  r108, r109, r110, r111, r112, r113, r114, r115, r116, r117, r118, r119,
-*  r120, r121, r122, r123, r124, r125, r126, r127,	
-**************************************************************************
-*/
-  //'preserved' FP regs:
-
-  /* We never generate references to these regs, so we don't need to declare
-   * that they are saved.  In fact, we could just remove them entirely.
-   * F2,F3,F4, F5,
-   * F16,F17,F18,F19,F20,F21,F22,F23,
-   * F24,F25,F26,F27,F28,F29,F30,F31,
-   */
-  
-  //'preserved' predicate regs:
-
-  /* We never generate references to these regs, so we don't need to declare
-    that they are saved.  In fact, we could just remove them entirely.
-    p1, p2, p3, p4, p5,
-    p16, p17, p18, p19, p20, p21, p22, p23,
-    p24, p25, p26, p27, p28, p29, p30, p31,
-    p32, p33, p34, p35, p36, p37, p38, p39,
-    p40, p41, p42, p43, p44, p45, p46, p47,
-    p48, p49, p50, p51, p52, p53, p54, p55,
-    p56, p57, p58, p59, p60, p61, p62, p63
-   */
-  ];
-
   // Our instruction set
   let InstructionSet = IA64InstrInfo;
 


Index: llvm/lib/Target/IA64/IA64RegisterInfo.cpp
diff -u llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.19 llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.20
--- llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.19	Thu May  4 12:52:23 2006
+++ llvm/lib/Target/IA64/IA64RegisterInfo.cpp	Wed May 17 19:12:11 2006
@@ -90,6 +90,21 @@
     BuildMI(MBB, MI, IA64::MOV, 1, DestReg).addReg(SrcReg);
 }
 
+const unsigned* IA64RegisterInfo::getCalleeSaveRegs() const {
+  static const unsigned CalleeSaveRegs[] = {
+    IA64::r5,  0
+  };
+  return CalleeSaveRegs;
+}
+
+const TargetRegisterClass* const*
+IA64RegisterInfo::getCalleeSaveRegClasses() const {
+  static const TargetRegisterClass * const CalleeSaveRegClasses[] = {
+    &IA64::GRRegClass,  0
+  };
+  return CalleeSaveRegClasses;
+}
+
 //===----------------------------------------------------------------------===//
 // Stack Frame Processing methods
 //===----------------------------------------------------------------------===//


Index: llvm/lib/Target/IA64/IA64RegisterInfo.h
diff -u llvm/lib/Target/IA64/IA64RegisterInfo.h:1.7 llvm/lib/Target/IA64/IA64RegisterInfo.h:1.8
--- llvm/lib/Target/IA64/IA64RegisterInfo.h:1.7	Fri Apr  7 11:34:45 2006
+++ llvm/lib/Target/IA64/IA64RegisterInfo.h	Wed May 17 19:12:11 2006
@@ -40,6 +40,10 @@
                     unsigned DestReg, unsigned SrcReg,
                     const TargetRegisterClass *RC) const;
 
+  const unsigned *getCalleeSaveRegs() const;
+
+  const TargetRegisterClass* const* getCalleeSaveRegClasses() const;
+
   void eliminateCallFramePseudoInstr(MachineFunction &MF,
                                      MachineBasicBlock &MBB,
                                      MachineBasicBlock::iterator MI) const;