[llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8.td SparcV8ISelDAGToDAG.cpp SparcV8Subtarget.cpp SparcV8Subtarget.h

[Chris Lattner]

Changes in directory llvm/lib/Target/SparcV8:

SparcV8.td updated: 1.7 -> 1.8
SparcV8ISelDAGToDAG.cpp updated: 1.59 -> 1.60
SparcV8Subtarget.cpp updated: 1.1 -> 1.2
SparcV8Subtarget.h updated: 1.1 -> 1.2
---
Log message:

Rest of subtarget support, remove references to ppc


---
Diffs of the changes:  (+38 -14)

 SparcV8.td              |   34 +++++++++++++++++++++++++++-------
 SparcV8ISelDAGToDAG.cpp |    8 ++++----
 SparcV8Subtarget.cpp    |    2 +-
 SparcV8Subtarget.h      |    8 ++++++--
 4 files changed, 38 insertions(+), 14 deletions(-)


Index: llvm/lib/Target/SparcV8/SparcV8.td
diff -u llvm/lib/Target/SparcV8/SparcV8.td:1.7 llvm/lib/Target/SparcV8/SparcV8.td:1.8
--- llvm/lib/Target/SparcV8/SparcV8.td:1.7	Thu Jan 26 00:51:21 2006
+++ llvm/lib/Target/SparcV8/SparcV8.td	Thu Jan 26 01:22:22 2006
@@ -17,12 +17,18 @@
 include "../Target.td"
 
 //===----------------------------------------------------------------------===//
-// PowerPC Subtarget features.
+// SPARC Subtarget features.
 //
  
-def Feature64Bit     : SubtargetFeature<"64bit", "bool", "Is64Bit",
-                                        "Enable 64-bit instructions">;
-
+def FeatureV9
+  : SubtargetFeature<"v9", "bool", "IsV9",
+                     "Enable SPARC-V9 instructions">;
+def FeatureV8Deprecated
+  : SubtargetFeature<"deprecated-v8", "bool", "V8DeprecatedInsts",
+                     "Enable deprecated V8 instructions in V9 mode">;
+def FeatureVIS
+  : SubtargetFeature<"vis", "bool", "IsVIS",
+                     "Enable UltraSPARC Visual Instruction Set extensions">;
 
 //===----------------------------------------------------------------------===//
 // Register File Description
@@ -48,9 +54,23 @@
 // SPARC processors supported.
 //===----------------------------------------------------------------------===//
 
-def : Processor<"generic", NoItineraries, []>;
-def : Processor<"v8", NoItineraries, []>;
-def : Processor<"v9", NoItineraries, [Feature64Bit]>;
+class Proc<string Name, list<SubtargetFeature> Features>
+ : Processor<Name, NoItineraries, Features>;
+
+def : Proc<"generic",         []>;
+def : Proc<"v8",              []>;
+def : Proc<"supersparc",      []>;
+def : Proc<"sparclite",       []>;
+def : Proc<"f934",            []>;
+def : Proc<"hypersparc",      []>;
+def : Proc<"sparclite86x",    []>;
+def : Proc<"sparclet",        []>;
+def : Proc<"tsc701",          []>;
+def : Proc<"v9",              [FeatureV9]>;
+def : Proc<"ultrasparc",      [FeatureV9, FeatureV8Deprecated]>;
+def : Proc<"ultrasparc3",     [FeatureV9, FeatureV8Deprecated]>;
+def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
+
 
 //===----------------------------------------------------------------------===//
 // Declare the target which we are implementing


Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.59 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.60
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.59	Wed Jan 25 12:52:42 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp	Thu Jan 26 01:22:22 2006
@@ -795,7 +795,7 @@
 //===----------------------------------------------------------------------===//
 
 //===--------------------------------------------------------------------===//
-/// SparcV8DAGToDAGISel - PPC specific code to select Sparc V8 machine
+/// SparcV8DAGToDAGISel - SPARC specific code to select Sparc V8 machine
 /// instructions for SelectionDAG operations.
 ///
 namespace {
@@ -816,7 +816,7 @@
   virtual void InstructionSelectBasicBlock(SelectionDAG &DAG);
   
   virtual const char *getPassName() const {
-    return "PowerPC DAG->DAG Pattern Instruction Selection";
+    return "SparcV8 DAG->DAG Pattern Instruction Selection";
   } 
   
   // Include the pieces autogenerated from the target description.
@@ -1011,8 +1011,8 @@
 }
 
 
-/// createPPCISelDag - This pass converts a legalized DAG into a 
-/// PowerPC-specific DAG, ready for instruction scheduling.
+/// createSparcV8ISelDag - This pass converts a legalized DAG into a 
+/// SPARC-specific DAG, ready for instruction scheduling.
 ///
 FunctionPass *llvm::createSparcV8ISelDag(TargetMachine &TM) {
   return new SparcV8DAGToDAGISel(TM);


Index: llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp:1.1 llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp:1.2
--- llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp:1.1	Thu Jan 26 00:51:21 2006
+++ llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp	Thu Jan 26 01:22:22 2006
@@ -24,4 +24,4 @@
   // Parse features string.
   ParseSubtargetFeatures(FS, CPU);
 
-};
\ No newline at end of file
+};


Index: llvm/lib/Target/SparcV8/SparcV8Subtarget.h
diff -u llvm/lib/Target/SparcV8/SparcV8Subtarget.h:1.1 llvm/lib/Target/SparcV8/SparcV8Subtarget.h:1.2
--- llvm/lib/Target/SparcV8/SparcV8Subtarget.h:1.1	Thu Jan 26 00:51:21 2006
+++ llvm/lib/Target/SparcV8/SparcV8Subtarget.h	Thu Jan 26 01:22:22 2006
@@ -21,11 +21,15 @@
   class Module;
   
 class SparcV8Subtarget : public TargetSubtarget {
-  bool Is64Bit;
+  bool IsV9;
+  bool V8DeprecatedInsts;
+  bool IsVIS;
 public:
   SparcV8Subtarget(const Module &M, const std::string &FS);
 
-  bool is64Bit() const { return Is64Bit; }
+  bool isV9() const { return IsV9; }
+  bool isVIS() const { return IsVIS; }
+  bool useDeprecatedV8Instructions() const { return V8DeprecatedInsts; }
   
   /// ParseSubtargetFeatures - Parses features string setting specified 
   /// subtarget options.  Definition of function is auto generated by tblgen.