[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCRegisterInfo.td PPCInstrInfo.td PPCInstrFormats.td
Nate Begeman
natebegeman at mac.com
Sat Nov 26 14:39:46 PST 2005
Changes in directory llvm/lib/Target/PowerPC:
PPCRegisterInfo.td updated: 1.21 -> 1.22
PPCInstrInfo.td updated: 1.144 -> 1.145
PPCInstrFormats.td updated: 1.56 -> 1.57
---
Log message:
Small tweaks noticed while on the plane.
---
Diffs of the changes: (+10 -5)
PPCInstrFormats.td | 6 ++++++
PPCInstrInfo.td | 7 +++----
PPCRegisterInfo.td | 2 +-
3 files changed, 10 insertions(+), 5 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.td
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.td:1.21 llvm/lib/Target/PowerPC/PPCRegisterInfo.td:1.22
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.td:1.21 Tue Nov 22 23:29:52 2005
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.td Sat Nov 26 16:39:34 2005
@@ -101,7 +101,7 @@
def F28 : FPR<28, "f28">; def F29 : FPR<29, "f29">;
def F30 : FPR<30, "f30">; def F31 : FPR<31, "f31">;
-// Floating-point registers
+// Vector registers
def V0 : VR< 0, "v0">; def V1 : VR< 1, "v1">;
def V2 : VR< 2, "v2">; def V3 : VR< 3, "v3">;
def V4 : VR< 4, "v4">; def V5 : VR< 5, "v5">;
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.144 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.145
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.144 Tue Nov 22 23:29:52 2005
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td Sat Nov 26 16:39:34 2005
@@ -464,9 +464,9 @@
def EXTSH : XForm_11<31, 922, (ops GPRC:$rA, GPRC:$rS),
"extsh $rA, $rS", IntGeneral,
[(set GPRC:$rA, (sext_inreg GPRC:$rS, i16))]>;
-def EXTSW : XForm_11<31, 986, (ops GPRC:$rA, GPRC:$rS),
- "extsw $rA, $rS", IntRotateD,
- []>, isPPC64;
+def EXTSW : XForm_11<31, 986, (ops G8RC:$rA, G8RC:$rS),
+ "extsw $rA, $rS", IntGeneral,
+ [(set G8RC:$rA, (sext_inreg G8RC:$rS, i32))]>, isPPC64;
def CMP : XForm_16<31, 0, (ops CRRC:$crD, i1imm:$long, GPRC:$rA, GPRC:$rB),
"cmp $crD, $long, $rA, $rB", IntCompare>;
def CMPL : XForm_16<31, 32, (ops CRRC:$crD, i1imm:$long, GPRC:$rA, GPRC:$rB),
@@ -794,7 +794,6 @@
"vxor $vD, $vA, $vB", VecGeneral,
[]>;
-
//===----------------------------------------------------------------------===//
// PowerPC Instruction Patterns
//
Index: llvm/lib/Target/PowerPC/PPCInstrFormats.td
diff -u llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.56 llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.57
--- llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.56 Tue Nov 22 23:29:52 2005
+++ llvm/lib/Target/PowerPC/PPCInstrFormats.td Sat Nov 26 16:39:34 2005
@@ -556,6 +556,8 @@
bits<5> VA;
bits<5> VB;
bits<5> VC;
+
+ let Pattern = pattern;
let Inst{6-10} = VD;
let Inst{11-15} = VA;
@@ -572,6 +574,8 @@
bits<5> VA;
bits<5> VB;
+ let Pattern = pattern;
+
let Inst{6-10} = VD;
let Inst{11-15} = VA;
let Inst{16-20} = VB;
@@ -586,6 +590,8 @@
bits<5> VA;
bits<5> VB;
+ let Pattern = pattern;
+
let Inst{6-10} = VD;
let Inst{11-15} = VA;
let Inst{16-20} = VB;
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