[llvm-commits] CVS: llvm/lib/Target/TargetSelectionDAG.td

[Duraid Madina]

Changes in directory llvm/lib/Target:

TargetSelectionDAG.td updated: 1.8 -> 1.9
---
Log message:

add support for SELECT to TargetSelectionDAG.td, add support for
selecting ints to IA64, and a few other ia64 bits and pieces



---
Diffs of the changes:  (+5 -0)

 TargetSelectionDAG.td |    5 +++++
 1 files changed, 5 insertions(+)


Index: llvm/lib/Target/TargetSelectionDAG.td
diff -u llvm/lib/Target/TargetSelectionDAG.td:1.8 llvm/lib/Target/TargetSelectionDAG.td:1.9
--- llvm/lib/Target/TargetSelectionDAG.td:1.8	Mon Oct 31 21:07:25 2005
+++ llvm/lib/Target/TargetSelectionDAG.td	Tue Nov  1 20:37:18 2005
@@ -109,6 +109,10 @@
   SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
 ]>;
 
+def SDTSelect : SDTypeProfile<1, 3, [ // select 
+  SDTCisInt<1>, SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>
+]>;
+
 //===----------------------------------------------------------------------===//
 // Selection DAG Node Properties.
 //
@@ -184,6 +188,7 @@
 def fp_to_uint : SDNode<"ISD::FP_TO_UINT" , SDTFPToIntOp>;
 
 def setcc      : SDNode<"ISD::SETCC"      , SDTSetCC>;
+def select     : SDNode<"ISD::SELECT"     , SDTSelect>;
 
 //===----------------------------------------------------------------------===//
 // Selection DAG Condition Codes