[llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp
Chris Lattner
lattner at cs.uiuc.edu
Wed Oct 26 09:59:48 PDT 2005
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.66 -> 1.67
---
Log message:
Add support for CondCode's
---
Diffs of the changes: (+14 -4)
DAGISelEmitter.cpp | 18 ++++++++++++++----
1 files changed, 14 insertions(+), 4 deletions(-)
Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.66 llvm/utils/TableGen/DAGISelEmitter.cpp:1.67
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.66 Tue Oct 25 15:35:14 2005
+++ llvm/utils/TableGen/DAGISelEmitter.cpp Wed Oct 26 11:59:37 2005
@@ -291,8 +291,13 @@
return true;
}
- TP.error("Type inference contradiction found in node " +
- getOperator()->getName() + "!");
+ if (isLeaf()) {
+ dump();
+ TP.error("Type inference contradiction found in node!");
+ } else {
+ TP.error("Type inference contradiction found in node " +
+ getOperator()->getName() + "!");
+ }
return true; // unreachable
}
@@ -466,8 +471,8 @@
// TODO: if a register appears in exactly one regclass, we could use that
// type info.
return MVT::isUnknown;
- } else if (R->isSubClassOf("ValueType")) {
- // Using a VTSDNode.
+ } else if (R->isSubClassOf("ValueType") || R->isSubClassOf("CondCode")) {
+ // Using a VTSDNode or CondCodeSDNode.
return MVT::Other;
} else if (R->getName() == "node") {
// Placeholder.
@@ -1582,6 +1587,11 @@
OS << " if (cast<VTSDNode>(" << RootName << i << ")->getVT() != "
<< "MVT::" << LeafRec->getName() << ") goto P" << PatternNo
<< "Fail;\n";
+ } else if (LeafRec->isSubClassOf("CondCode")) {
+ // Make sure this is the specified cond code.
+ OS << " if (cast<CondCodeSDNode>(" << RootName << i
+ << ")->get() != " << "MVT::" << LeafRec->getName()
+ << ") goto P" << PatternNo << "Fail;\n";
} else {
Child->dump();
assert(0 && "Unknown leaf type!");
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