[llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAG.h

[Chris Lattner]

Changes in directory llvm/include/llvm/CodeGen:

SelectionDAG.h updated: 1.57 -> 1.58
---
Log message:

Allow physregs to occur in the dag with multiple types.  Though I don't like
this, it is a requirement on PPC, which can have an f32 value in r3 at one
point in a function and a f64 value in r3 at another point.  :(


---
Diffs of the changes:  (+1 -1)

 SelectionDAG.h |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/include/llvm/CodeGen/SelectionDAG.h
diff -u llvm/include/llvm/CodeGen/SelectionDAG.h:1.57 llvm/include/llvm/CodeGen/SelectionDAG.h:1.58
--- llvm/include/llvm/CodeGen/SelectionDAG.h:1.57	Mon Aug 29 20:56:13 2005
+++ llvm/include/llvm/CodeGen/SelectionDAG.h	Tue Aug 30 17:38:05 2005
@@ -355,7 +355,7 @@
   std::map<std::pair<unsigned, std::pair<SDOperand, SDOperand> >,
            SDNode *> BinaryOps;
 
-  std::vector<RegisterSDNode*> RegNodes;
+  std::map<std::pair<unsigned, MVT::ValueType>, RegisterSDNode*> RegNodes;
   std::vector<CondCodeSDNode*> CondCodeNodes;
 
   std::map<std::pair<SDOperand, std::pair<SDOperand, MVT::ValueType> >,