[llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAG.h

[Chris Lattner]

Changes in directory llvm/include/llvm/CodeGen:

SelectionDAG.h updated: 1.56 -> 1.57
---
Log message:

add some method variants


---
Diffs of the changes:  (+39 -0)

 SelectionDAG.h |   39 +++++++++++++++++++++++++++++++++++++++
 1 files changed, 39 insertions(+)


Index: llvm/include/llvm/CodeGen/SelectionDAG.h
diff -u llvm/include/llvm/CodeGen/SelectionDAG.h:1.56 llvm/include/llvm/CodeGen/SelectionDAG.h:1.57
--- llvm/include/llvm/CodeGen/SelectionDAG.h:1.56	Mon Aug 29 17:00:00 2005
+++ llvm/include/llvm/CodeGen/SelectionDAG.h	Mon Aug 29 20:56:13 2005
@@ -112,6 +112,22 @@
                    getRegister(Reg, N.getValueType()), N);
   }
 
+  // This version of the getCopyToReg method takes an extra operand, which
+  // indicates that there is potentially an incoming flag value (if Flag is not
+  // null) and that there should be a flag result.
+  SDOperand getCopyToReg(SDOperand Chain, unsigned Reg, SDOperand N,
+                         SDOperand Flag) {
+    std::vector<MVT::ValueType> VTs;
+    VTs.push_back(MVT::Other);
+    VTs.push_back(MVT::Flag);
+    std::vector<SDOperand> Ops;
+    Ops.push_back(Chain);
+    Ops.push_back(getRegister(Reg, N.getValueType()));
+    Ops.push_back(N);
+    if (Flag.Val) Ops.push_back(Flag);
+    return getNode(ISD::CopyToReg, VTs, Ops);
+  }
+  
   SDOperand getCopyFromReg(SDOperand Chain, unsigned Reg, MVT::ValueType VT) {
     std::vector<MVT::ValueType> ResultTys;
     ResultTys.push_back(VT);
@@ -121,6 +137,22 @@
     Ops.push_back(getRegister(Reg, VT));
     return getNode(ISD::CopyFromReg, ResultTys, Ops);
   }
+  
+  // This version of the getCopyFromReg method takes an extra operand, which
+  // indicates that there is potentially an incoming flag value (if Flag is not
+  // null) and that there should be a flag result.
+  SDOperand getCopyFromReg(SDOperand Chain, unsigned Reg, MVT::ValueType VT,
+                           SDOperand Flag) {
+    std::vector<MVT::ValueType> ResultTys;
+    ResultTys.push_back(VT);
+    ResultTys.push_back(MVT::Other);
+    ResultTys.push_back(MVT::Flag);
+    std::vector<SDOperand> Ops;
+    Ops.push_back(Chain);
+    Ops.push_back(getRegister(Reg, VT));
+    if (Flag.Val) Ops.push_back(Flag);
+    return getNode(ISD::CopyFromReg, ResultTys, Ops);
+  }
 
   SDOperand getImplicitDef(SDOperand Chain, unsigned Reg, MVT::ValueType VT) {
     return getNode(ISD::ImplicitDef, MVT::Other, Chain, getRegister(Reg, VT));
@@ -277,6 +309,13 @@
                           std::vector<SDOperand> &Ops) {
     return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Ops);
   }
+  SDOperand getTargetNode(unsigned Opcode, MVT::ValueType VT1, 
+                          MVT::ValueType VT2, std::vector<SDOperand> &Ops) {
+    std::vector<MVT::ValueType> ResultTys;
+    ResultTys.push_back(VT1);
+    ResultTys.push_back(VT2);
+    return getNode(ISD::BUILTIN_OP_END+Opcode, ResultTys, Ops);
+  }
   
   /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
   /// This can cause recursive merging of nodes in the DAG.  Use the first