[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC32ISelLowering.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/PowerPC:

PPC32ISelLowering.cpp updated: 1.12 -> 1.13
---
Log message:

Fix a bug in my patch for legalizing to fsel.  It cannot handle seteq/setne,
which I failed to include when I moved the code over.  This fixes
MallocBench/gs.


---
Diffs of the changes:  (+4 -0)

 PPC32ISelLowering.cpp |    4 ++++
 1 files changed, 4 insertions(+)


Index: llvm/lib/Target/PowerPC/PPC32ISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPC32ISelLowering.cpp:1.12 llvm/lib/Target/PowerPC/PPC32ISelLowering.cpp:1.13
--- llvm/lib/Target/PowerPC/PPC32ISelLowering.cpp:1.12	Mon Aug 29 19:19:00 2005
+++ llvm/lib/Target/PowerPC/PPC32ISelLowering.cpp	Mon Aug 29 19:45:18 2005
@@ -111,6 +111,10 @@
     if (MVT::isFloatingPoint(Op.getOperand(0).getValueType()) &&
         MVT::isFloatingPoint(Op.getOperand(2).getValueType())) {
       ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
+      
+      // Cannot handle SETEQ/SETNE.
+      if (CC == ISD::SETEQ || CC == ISD::SETNE) break;
+      
       MVT::ValueType ResVT = Op.getValueType();
       MVT::ValueType CmpVT = Op.getOperand(0).getValueType();
       SDOperand LHS = Op.getOperand(0), RHS = Op.getOperand(1);