[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaRegisterInfo.td

[Chris Lattner]

Changes in directory llvm/lib/Target/Alpha:

AlphaRegisterInfo.td updated: 1.11 -> 1.12
---
Log message:

Put register classes in namespaces


---
Diffs of the changes:  (+2 -2)

 AlphaRegisterInfo.td |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaRegisterInfo.td
diff -u llvm/lib/Target/Alpha/AlphaRegisterInfo.td:1.11 llvm/lib/Target/Alpha/AlphaRegisterInfo.td:1.12
--- llvm/lib/Target/Alpha/AlphaRegisterInfo.td:1.11	Tue Jun 28 19:31:08 2005
+++ llvm/lib/Target/Alpha/AlphaRegisterInfo.td	Fri Aug 19 13:50:46 2005
@@ -79,7 +79,7 @@
 
 /// Register classes
 // Don't allocate 15, 28, 30, 31
-def GPRC : RegisterClass<i64, 64,
+def GPRC : RegisterClass<"Alpha", i64, 64,
      // Volatile
      [R0, R1, R2, R3, R4, R5, R6, R7, R8, R16, R17, R18, R19, R20, R21, R22,
       R23, R24, R25, 
@@ -93,7 +93,7 @@
 
 // Don't allocate 15, 29, 30, 31
 // Allocation volatiles only for now
-def FPRC : RegisterClass<f64, 64, [F0, F1, 
+def FPRC : RegisterClass<"Alpha", f64, 64, [F0, F1, 
         F10, F11, F12, F13, F14, F15, F16, F17, F18, F19,
         F20, F21, F22, F23, F24, F25, F26, F27, F28, F29, F30,
         // Saved: