[llvm-commits] CVS: llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp
Chris Lattner
lattner at cs.uiuc.edu
Wed Aug 17 12:33:41 PDT 2005
Changes in directory llvm/lib/Target/PowerPC:
PowerPCTargetMachine.cpp updated: 1.63 -> 1.64
---
Log message:
add a beta option for turning on dag->dag isel
---
Diffs of the changes: (+9 -3)
PowerPCTargetMachine.cpp | 12 +++++++++---
1 files changed, 9 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp
diff -u llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp:1.63 llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp:1.64
--- llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp:1.63 Mon Aug 15 18:47:04 2005
+++ llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp Wed Aug 17 14:33:30 2005
@@ -30,8 +30,11 @@
using namespace llvm;
namespace {
- const std::string PPC32ID = "PowerPC/32bit";
+ const char *PPC32ID = "PowerPC/32bit";
+ static cl::opt<bool> EnablePPCDAGDAG("enable-ppc-dag-isel", cl::Hidden,
+ cl::desc("Enable DAG-to-DAG isel for PPC (beta)"));
+
// Register the targets
RegisterTarget<PPC32TargetMachine>
X("ppc32", " PowerPC 32-bit");
@@ -81,8 +84,11 @@
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
- // Default to pattern ISel
- if (PatternISelTriState == 0) {
+ // Install an instruction selector.
+ if (EnablePPCDAGDAG) {
+ PM.add(createPPC32ISelDag(*this));
+
+ } else if (PatternISelTriState == 0) {
PM.add(createLowerConstantExpressionsPass());
PM.add(createPPC32ISelSimple(*this));
} else
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