[llvm-commits] CVS: llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp
Chris Lattner
lattner at cs.uiuc.edu
Mon Aug 15 16:47:16 PDT 2005
Changes in directory llvm/lib/Target/PowerPC:
PowerPCTargetMachine.cpp updated: 1.62 -> 1.63
---
Log message:
Turn loop strength reduction on by default.
Only run createLowerConstantExpressionsPass for the simple isel. The DAG
isel has no need for it.
---
Diffs of the changes: (+14 -20)
PowerPCTargetMachine.cpp | 34 ++++++++++++++--------------------
1 files changed, 14 insertions(+), 20 deletions(-)
Index: llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp
diff -u llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp:1.62 llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp:1.63
--- llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp:1.62 Sat Aug 13 00:59:16 2005
+++ llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp Mon Aug 15 18:47:04 2005
@@ -7,6 +7,7 @@
//
//===----------------------------------------------------------------------===//
//
+// Top-level implementation for the PowerPC target.
//
//===----------------------------------------------------------------------===//
@@ -28,9 +29,6 @@
#include <iostream>
using namespace llvm;
-static cl::opt<bool> EnablePPCLSR("enable-lsr-for-ppc", cl::Hidden,
- cl::desc("Enable LSR for PPC (beta)"));
-
namespace {
const std::string PPC32ID = "PowerPC/32bit";
@@ -67,11 +65,9 @@
CodeGenFileType FileType) {
if (FileType != TargetMachine::AssemblyFile) return true;
- if (EnablePPCLSR) {
- PM.add(createLoopStrengthReducePass());
- PM.add(createVerifierPass());
- PM.add(createCFGSimplificationPass());
- }
+ // Run loop strength reduction before anything else.
+ PM.add(createLoopStrengthReducePass());
+ PM.add(createCFGSimplificationPass());
// FIXME: Implement efficient support for garbage collection intrinsics.
PM.add(createLowerGCPass());
@@ -82,15 +78,14 @@
// FIXME: Implement the switch instruction in the instruction selector!
PM.add(createLowerSwitchPass());
- PM.add(createLowerConstantExpressionsPass());
-
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
// Default to pattern ISel
- if (PatternISelTriState == 0)
+ if (PatternISelTriState == 0) {
+ PM.add(createLowerConstantExpressionsPass());
PM.add(createPPC32ISelSimple(*this));
- else
+ } else
PM.add(createPPC32ISelPattern(*this));
if (PrintMachineCode)
@@ -126,10 +121,9 @@
// The JIT does not support or need PIC.
PICEnabled = false;
- if (EnablePPCLSR) {
- PM.add(createLoopStrengthReducePass());
- PM.add(createCFGSimplificationPass());
- }
+ // Run loop strength reduction before anything else.
+ PM.add(createLoopStrengthReducePass());
+ PM.add(createCFGSimplificationPass());
// FIXME: Implement efficient support for garbage collection intrinsics.
PM.add(createLowerGCPass());
@@ -140,16 +134,16 @@
// FIXME: Implement the switch instruction in the instruction selector!
PM.add(createLowerSwitchPass());
- PM.add(createLowerConstantExpressionsPass());
-
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
// Default to pattern ISel
- if (PatternISelTriState == 0)
+ if (PatternISelTriState == 0) {
+ PM.add(createLowerConstantExpressionsPass());
PM.add(createPPC32ISelSimple(TM));
- else
+ } else {
PM.add(createPPC32ISelPattern(TM));
+ }
PM.add(createRegisterAllocator());
PM.add(createPrologEpilogCodeInserter());
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