[llvm-commits] CVS: llvm/include/llvm/CodeGen/LiveVariables.h MachineFunction.h MachineInstr.h SchedGraphCommon.h

Misha Brukman brukman at cs.uiuc.edu
Thu Apr 21 20:45:30 PDT 2005



Changes in directory llvm/include/llvm/CodeGen:

LiveVariables.h updated: 1.21 -> 1.22
MachineFunction.h updated: 1.52 -> 1.53
MachineInstr.h updated: 1.161 -> 1.162
SchedGraphCommon.h updated: 1.13 -> 1.14
---
Log message:

Convert tabs to spaces


---
Diffs of the changes:  (+46 -46)

 LiveVariables.h    |    2 +-
 MachineFunction.h  |    4 ++--
 MachineInstr.h     |   44 ++++++++++++++++++++++----------------------
 SchedGraphCommon.h |   42 +++++++++++++++++++++---------------------
 4 files changed, 46 insertions(+), 46 deletions(-)


Index: llvm/include/llvm/CodeGen/LiveVariables.h
diff -u llvm/include/llvm/CodeGen/LiveVariables.h:1.21 llvm/include/llvm/CodeGen/LiveVariables.h:1.22
--- llvm/include/llvm/CodeGen/LiveVariables.h:1.21	Thu Apr 21 15:38:00 2005
+++ llvm/include/llvm/CodeGen/LiveVariables.h	Thu Apr 21 22:45:18 2005
@@ -243,7 +243,7 @@
 
   void MarkVirtRegAliveInBlock(VarInfo &VRInfo, MachineBasicBlock *BB);
   void HandleVirtRegUse(VarInfo &VRInfo, MachineBasicBlock *MBB,
-                       	MachineInstr *MI);
+                        MachineInstr *MI);
 };
 
 } // End llvm namespace


Index: llvm/include/llvm/CodeGen/MachineFunction.h
diff -u llvm/include/llvm/CodeGen/MachineFunction.h:1.52 llvm/include/llvm/CodeGen/MachineFunction.h:1.53
--- llvm/include/llvm/CodeGen/MachineFunction.h:1.52	Thu Apr 21 15:38:00 2005
+++ llvm/include/llvm/CodeGen/MachineFunction.h	Thu Apr 21 22:45:18 2005
@@ -61,8 +61,8 @@
   void removeNodeFromList(MachineBasicBlock* N);
   void transferNodesFromList(iplist<MachineBasicBlock,
                                     ilist_traits<MachineBasicBlock> > &toList,
-			     ilist_iterator<MachineBasicBlock> first,
-			     ilist_iterator<MachineBasicBlock> last);
+                             ilist_iterator<MachineBasicBlock> first,
+                             ilist_iterator<MachineBasicBlock> last);
 };
 
 /// MachineFunctionInfo - This class can be derived from and used by targets to


Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.161 llvm/include/llvm/CodeGen/MachineInstr.h:1.162
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.161	Thu Apr 21 15:38:00 2005
+++ llvm/include/llvm/CodeGen/MachineInstr.h	Thu Apr 21 22:45:18 2005
@@ -43,29 +43,29 @@
 //   first and initialize each one later.
 //
 //   E.g, for this VM instruction:
-//		ptr = alloca type, numElements
+//     ptr = alloca type, numElements
 //   we generate 2 machine instructions on the SPARC:
 //
-//		mul Constant, Numelements -> Reg
-//		add %sp, Reg -> Ptr
+//    mul Constant, Numelements -> Reg
+//    add %sp, Reg -> Ptr
 //
 //   Each instruction has 3 operands, listed above.  Of those:
-//   -	Reg, NumElements, and Ptr are of operand type MO_Register.
-//   -	Constant is of operand type MO_SignExtendedImmed on the SPARC.
-//	
+//   - Reg, NumElements, and Ptr are of operand type MO_Register.
+//   - Constant is of operand type MO_SignExtendedImmed on the SPARC.
+//
 //   For the register operands, the virtual register type is as follows:
-//	
-//   -  Reg will be of virtual register type MO_MInstrVirtualReg.  The field
-//	MachineInstr* minstr will point to the instruction that computes reg.
 //
-//   -	%sp will be of virtual register type MO_MachineReg.
-//	The field regNum identifies the machine register.
+//   - Reg will be of virtual register type MO_MInstrVirtualReg.  The field
+//     MachineInstr* minstr will point to the instruction that computes reg.
+//
+//   - %sp will be of virtual register type MO_MachineReg.
+//     The field regNum identifies the machine register.
 //
-//   -	NumElements will be of virtual register type MO_VirtualReg.
-//	The field Value* value identifies the value.
+//   - NumElements will be of virtual register type MO_VirtualReg.
+//     The field Value* value identifies the value.
 //
-//   -	Ptr will also be of virtual register type MO_VirtualReg.
-//	Again, the field Value* value identifies the value.
+//   - Ptr will also be of virtual register type MO_VirtualReg.
+//     Again, the field Value* value identifies the value.
 //
 //===----------------------------------------------------------------------===//
 
@@ -96,8 +96,8 @@
   };
 
   enum MachineOperandType {
-    MO_VirtualRegister,		// virtual register for *value
-    MO_MachineRegister,		// pre-assigned machine register `regNum'
+    MO_VirtualRegister,         // virtual register for *value
+    MO_MachineRegister,         // pre-assigned machine register `regNum'
     MO_CCRegister,
     MO_SignExtendedImmed,
     MO_UnextendedImmed,
@@ -118,7 +118,7 @@
                         //   the generated machine code.
                         // LLVM global for MO_GlobalAddress.
 
-    int64_t immedVal;		// Constant value for an explicit constant
+    int64_t immedVal;   // Constant value for an explicit constant
 
     MachineBasicBlock *MBB;     // For MO_MachineBasicBlock type
     const char *SymbolName;     // For MO_ExternalSymbol type
@@ -127,7 +127,7 @@
   char flags;                   // see bit field definitions above
   MachineOperandType opType:8;  // Pack into 8 bits efficiently after flags.
   union {
-    int regNum;	                // register number for an explicit register
+    int regNum;                 // register number for an explicit register
                                 // will be set for a value after reg allocation
 
     int offset;                 // Offset to address of global or external, only
@@ -154,7 +154,7 @@
   }
 
   MachineOperand(Value *V, MachineOperandType OpTy, UseType UseTy,
-		 bool isPCRelative = false)
+                 bool isPCRelative = false)
     : flags(UseTy | (isPCRelative?PCRELATIVE:0)), opType(OpTy) {
     assert(OpTy != MachineOperand::MO_GlobalAddress);
     zeroContents();
@@ -163,7 +163,7 @@
   }
 
   MachineOperand(GlobalValue *V, MachineOperandType OpTy, UseType UseTy,
-		 bool isPCRelative = false, int Offset = 0)
+                 bool isPCRelative = false, int Offset = 0)
     : flags(UseTy | (isPCRelative?PCRELATIVE:0)), opType(OpTy) {
     assert(OpTy == MachineOperand::MO_GlobalAddress);
     zeroContents ();
@@ -366,7 +366,7 @@
   ///
   void setRegForValue(int reg) {
     assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
-	   opType == MO_MachineRegister);
+           opType == MO_MachineRegister);
     extra.regNum = reg;
   }
 


Index: llvm/include/llvm/CodeGen/SchedGraphCommon.h
diff -u llvm/include/llvm/CodeGen/SchedGraphCommon.h:1.13 llvm/include/llvm/CodeGen/SchedGraphCommon.h:1.14
--- llvm/include/llvm/CodeGen/SchedGraphCommon.h:1.13	Thu Apr 21 15:38:00 2005
+++ llvm/include/llvm/CodeGen/SchedGraphCommon.h	Thu Apr 21 22:45:18 2005
@@ -57,7 +57,7 @@
 
   // Iterators
   iterator beginInEdges() { return inEdges.begin(); }
-  iterator endInEdges()	 { return inEdges.end(); }
+  iterator endInEdges() { return inEdges.end(); }
   iterator beginOutEdges() { return outEdges.begin(); }
   iterator endOutEdges() { return outEdges.end(); }
 
@@ -73,11 +73,11 @@
 
 protected:
   friend class SchedGraphCommon;
-  friend class SchedGraphEdge;		// give access for adding edges
+  friend class SchedGraphEdge;   // give access for adding edges
 
 
   // disable default constructor and provide a ctor for single-block graphs
-  SchedGraphNodeCommon();	// DO NOT IMPLEMENT
+  SchedGraphNodeCommon();  // DO NOT IMPLEMENT
 
   inline SchedGraphNodeCommon(unsigned Id, int index, int late=0) : ID(Id), latency(late), origIndexInBB(index) {}
 
@@ -93,7 +93,7 @@
 
 // ostream << operator for SchedGraphNode class
 inline std::ostream &operator<<(std::ostream &os,
-				const SchedGraphNodeCommon &node) {
+                                const SchedGraphNodeCommon &node) {
   node.print(os);
   return os;
 }
@@ -114,8 +114,8 @@
   };
 
 protected:
-  SchedGraphNodeCommon*	src;
-  SchedGraphNodeCommon*	sink;
+  SchedGraphNodeCommon* src;
+  SchedGraphNodeCommon* sink;
   SchedGraphEdgeDepType depType;
   unsigned int depOrderType;
   int minDelay; // cached latency (assumes fixed target arch)
@@ -127,35 +127,35 @@
     ResourceId   resourceId;
   };
 
-public:	
+public:
   // For all constructors, if minDelay is unspecified, minDelay is
   // set to _src->getLatency().
 
   // constructor for CtrlDep or MemoryDep edges, selected by 3rd argument
   SchedGraphEdge(SchedGraphNodeCommon* _src, SchedGraphNodeCommon* _sink,
-		 SchedGraphEdgeDepType _depType, unsigned int _depOrderType,
-		 int _minDelay = -1);
+                 SchedGraphEdgeDepType _depType, unsigned int _depOrderType,
+                 int _minDelay = -1);
 
   // constructor for explicit value dependence (may be true/anti/output)
   SchedGraphEdge(SchedGraphNodeCommon* _src, SchedGraphNodeCommon* _sink,
-		 const Value* _val, unsigned int _depOrderType,
-		 int _minDelay = -1);
+                 const Value* _val, unsigned int _depOrderType,
+                 int _minDelay = -1);
 
   // constructor for machine register dependence
   SchedGraphEdge(SchedGraphNodeCommon* _src,SchedGraphNodeCommon* _sink,
-		 unsigned int _regNum, unsigned int _depOrderType,
-		 int _minDelay = -1);
+                 unsigned int _regNum, unsigned int _depOrderType,
+                 int _minDelay = -1);
 
   // constructor for any other machine resource dependences.
   // DataDepOrderType is always NonDataDep.  It it not an argument to
   // avoid overloading ambiguity with previous constructor.
   SchedGraphEdge(SchedGraphNodeCommon* _src, SchedGraphNodeCommon* _sink,
-		 ResourceId _resourceId, int _minDelay = -1);
+                 ResourceId _resourceId, int _minDelay = -1);
 
   ~SchedGraphEdge() {}
 
-  SchedGraphNodeCommon*	getSrc() const { return src; }
-  SchedGraphNodeCommon*	getSink() const { return sink; }
+  SchedGraphNodeCommon* getSrc() const { return src; }
+  SchedGraphNodeCommon* getSink() const { return sink; }
   int getMinDelay() const { return minDelay; }
   SchedGraphEdgeDepType getDepType() const { return depType; }
   unsigned int getDepOrderType() const { return depOrderType; }
@@ -187,7 +187,7 @@
 
 private:
   // disable default ctor
-  SchedGraphEdge();	// DO NOT IMPLEMENT
+  SchedGraphEdge(); // DO NOT IMPLEMENT
 };
 
 // ostream << operator for SchedGraphNode class
@@ -247,12 +247,12 @@
   inline _EdgeType* getEdge() const { return *(oi); }
 
   inline _Self &operator++() { ++oi; return *this; }    // Preincrement
-  inline _Self operator++(int) {                      	// Postincrement
+  inline _Self operator++(int) {                        // Postincrement
     _Self tmp(*this); ++*this; return tmp;
   }
 
   inline _Self &operator--() { --oi; return *this; }    // Predecrement
-  inline _Self operator--(int) {                       	// Postdecrement
+  inline _Self operator--(int) {                        // Postdecrement
     _Self tmp = *this; --*this; return tmp;
   }
 };
@@ -275,12 +275,12 @@
   inline _EdgeType* getEdge() const { return *(oi); }
 
   inline _Self &operator++() { ++oi; return *this; }    // Preincrement
-  inline _Self operator++(int) {                      	// Postincrement
+  inline _Self operator++(int) {                        // Postincrement
     _Self tmp(*this); ++*this; return tmp;
   }
 
   inline _Self &operator--() { --oi; return *this; }    // Predecrement
-  inline _Self operator--(int) {                       	// Postdecrement
+  inline _Self operator--(int) {                        // Postdecrement
     _Self tmp = *this; --*this; return tmp;
   }
 };






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