[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

[Chris Lattner]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.81 -> 1.82
---
Log message:

Fix expansion of shifts by exactly NVT bits on arch's (like X86) that have
masking shifts.

This fixes the miscompilation of this:

long long test1(unsigned A, unsigned B) {
        return ((unsigned long long)A << 32) | B;
}

into this:

test1:
        movl 4(%esp), %edx
        movl %edx, %eax
        orl 8(%esp), %eax
        ret

allowing us to generate this instead:

test1:
        movl 4(%esp), %edx
        movl 8(%esp), %eax
        ret



---
Diffs of the changes:  (+10 -0)

 LegalizeDAG.cpp |   10 ++++++++++
 1 files changed, 10 insertions(+)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.81 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.82
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.81	Sun Apr 10 22:01:51 2005
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	Mon Apr 11 15:08:52 2005
@@ -1500,6 +1500,9 @@
       } else if (Cst > NVTBits) {
         Lo = DAG.getConstant(0, NVT);
         Hi = DAG.getNode(ISD::SHL, NVT, InL, DAG.getConstant(Cst-NVTBits,ShTy));
+      } else if (Cst == NVTBits) {
+        Lo = DAG.getConstant(0, NVT);
+        Hi = InL;
       } else {
         Lo = DAG.getNode(ISD::SHL, NVT, InL, DAG.getConstant(Cst, ShTy));
         Hi = DAG.getNode(ISD::OR, NVT,
@@ -1514,6 +1517,9 @@
       } else if (Cst > NVTBits) {
         Lo = DAG.getNode(ISD::SRL, NVT, InH, DAG.getConstant(Cst-NVTBits,ShTy));
         Hi = DAG.getConstant(0, NVT);
+      } else if (Cst == NVTBits) {
+        Lo = InH;
+        Hi = DAG.getConstant(0, NVT);
       } else {
         Lo = DAG.getNode(ISD::OR, NVT,
            DAG.getNode(ISD::SRL, NVT, InL, DAG.getConstant(Cst, ShTy)),
@@ -1530,6 +1536,10 @@
                            DAG.getConstant(Cst-NVTBits, ShTy));
         Hi = DAG.getNode(ISD::SRA, NVT, InH, 
                               DAG.getConstant(NVTBits-1, ShTy));
+      } else if (Cst == NVTBits) {
+        Lo = InH;
+        Hi = DAG.getNode(ISD::SRA, NVT, InH, 
+                              DAG.getConstant(NVTBits-1, ShTy));
       } else {
         Lo = DAG.getNode(ISD::OR, NVT,
            DAG.getNode(ISD::SRL, NVT, InL, DAG.getConstant(Cst, ShTy)),