[llvm-commits] CVS: llvm/lib/Target/X86/X86RegisterInfo.cpp X86InstrInfo.td

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

X86RegisterInfo.cpp updated: 1.99 -> 1.100
X86InstrInfo.td updated: 1.120 -> 1.121
---
Log message:

add signed versions of the extra precision multiplies


---
Diffs of the changes:  (+16 -0)

 X86InstrInfo.td     |   13 +++++++++++++
 X86RegisterInfo.cpp |    3 +++
 2 files changed, 16 insertions(+)


Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.99 llvm/lib/Target/X86/X86RegisterInfo.cpp:1.100
--- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.99	Wed Jan 19 01:50:03 2005
+++ llvm/lib/Target/X86/X86RegisterInfo.cpp	Tue Apr  5 23:19:22 2005
@@ -149,6 +149,9 @@
     case X86::MUL8r:     return MakeMInst( X86::MUL8m ,  FrameIndex, MI);
     case X86::MUL16r:    return MakeMInst( X86::MUL16m,  FrameIndex, MI);
     case X86::MUL32r:    return MakeMInst( X86::MUL32m,  FrameIndex, MI);
+    case X86::IMUL8r:    return MakeMInst( X86::IMUL8m , FrameIndex, MI);
+    case X86::IMUL16r:   return MakeMInst( X86::IMUL16m, FrameIndex, MI);
+    case X86::IMUL32r:   return MakeMInst( X86::IMUL32m, FrameIndex, MI);
     case X86::DIV8r:     return MakeMInst( X86::DIV8m ,  FrameIndex, MI);
     case X86::DIV16r:    return MakeMInst( X86::DIV16m,  FrameIndex, MI);
     case X86::DIV32r:    return MakeMInst( X86::DIV32m,  FrameIndex, MI);


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.120 llvm/lib/Target/X86/X86InstrInfo.td:1.121
--- llvm/lib/Target/X86/X86InstrInfo.td:1.120	Fri Apr  1 22:31:56 2005
+++ llvm/lib/Target/X86/X86InstrInfo.td	Tue Apr  5 23:19:22 2005
@@ -339,6 +339,19 @@
 def MUL32m : I<0xF7, MRM4m, (ops i32mem:$src),
                "mul{l} $src">, Imp<[EAX],[EAX,EDX]>;   // EAX,EDX = EAX*[mem32]
 
+def IMUL8r  : I<0xF6, MRM5r, (ops R8:$src), "imul{b} $src">,
+              Imp<[AL],[AX]>;               // AL,AH = AL*R8
+def IMUL16r : I<0xF7, MRM5r, (ops R16:$src), "imul{w} $src">,
+              Imp<[AX],[AX,DX]>, OpSize;    // AX,DX = AX*R16
+def IMUL32r : I<0xF7, MRM5r, (ops R32:$src), "imul{l} $src">,
+              Imp<[EAX],[EAX,EDX]>;         // EAX,EDX = EAX*R32
+def IMUL8m  : I<0xF6, MRM5m, (ops i8mem :$src),
+                "imul{b} $src">, Imp<[AL],[AX]>;           // AL,AH = AL*[mem8]
+def IMUL16m : I<0xF7, MRM5m, (ops i16mem:$src),
+                "imul{w} $src">, Imp<[AX],[AX,DX]>, OpSize;// AX,DX = AX*[mem16]
+def IMUL32m : I<0xF7, MRM5m, (ops i32mem:$src),
+                "imul{l} $src">, Imp<[EAX],[EAX,EDX]>;  // EAX,EDX = EAX*[mem32]
+
 // unsigned division/remainder
 def DIV8r  : I<0xF6, MRM6r, (ops R8:$src),          // AX/r8 = AL,AH
                "div{b} $src">, Imp<[AX],[AX]>;