[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelPattern.cpp

[Andrew Lenharth]

Changes in directory llvm/lib/Target/Alpha:

AlphaISelPattern.cpp updated: 1.74 -> 1.75
---
Log message:

FNEG/FABS/UNDEF

---
Diffs of the changes:  (+13 -3)

 AlphaISelPattern.cpp |   16 +++++++++++++---
 1 files changed, 13 insertions(+), 3 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaISelPattern.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.74 llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.75
--- llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.74	Sat Apr  2 13:04:58 2005
+++ llvm/lib/Target/Alpha/AlphaISelPattern.cpp	Sat Apr  2 13:11:07 2005
@@ -537,15 +537,19 @@
     Node->dump();
     assert(0 && "Node not handled!\n");
 
+  case ISD::UNDEF: {
+    BuildMI(BB, Alpha::IDEF, 0, Result);
+    return Result;
+  }
+
   case ISD::FNEG:
     if(ISD::FABS == N.getOperand(0).getOpcode())
       {
 	Tmp1 = SelectExpr(N.getOperand(0).getOperand(0));
-	BuildMI(BB, Alpha::CPYSN, 2, Result).addReg(Tmp1).addReg(Tmp1);
+	BuildMI(BB, Alpha::CPYSN, 2, Result).addReg(Alpha::F31).addReg(Tmp1);
       } else {
 	Tmp1 = SelectExpr(N.getOperand(0));
-	Opc = DestType == MVT::f64 ? Alpha::SUBT : Alpha::SUBS ;
-	BuildMI(BB, Opc, 2, Result).addReg(Alpha::F31).addReg(Tmp1);
+	BuildMI(BB, Alpha::CPYSN, 2, Result).addReg(Tmp1).addReg(Tmp1);
       }
     return Result;
 
@@ -850,6 +854,12 @@
     Node->dump();
     assert(0 && "Node not handled!\n");
  
+
+  case ISD::UNDEF: {
+    BuildMI(BB, Alpha::IDEF, 0, Result);
+    return Result;
+  }
+    
   case ISD::DYNAMIC_STACKALLOC:
     // Generate both result values.
     if (Result != notIn)