[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelPattern.cpp AlphaInstrInfo.td

Andrew Lenharth alenhar2 at cs.uiuc.edu
Wed Feb 2 09:33:00 PST 2005



Changes in directory llvm/lib/Target/Alpha:

AlphaISelPattern.cpp updated: 1.29 -> 1.30
AlphaInstrInfo.td updated: 1.15 -> 1.16
---
Log message:

Store fix

---
Diffs of the changes:  (+37 -15)

 AlphaISelPattern.cpp |   46 +++++++++++++++++++++++++++++++++-------------
 AlphaInstrInfo.td    |    6 ++++--
 2 files changed, 37 insertions(+), 15 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaISelPattern.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.29 llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.30
--- llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.29	Wed Feb  2 11:00:21 2005
+++ llvm/lib/Target/Alpha/AlphaISelPattern.cpp	Wed Feb  2 11:32:39 2005
@@ -1170,19 +1170,39 @@
      return;
 
   case ISD::STORE: 
-    Select(N.getOperand(0));
-    Tmp1 = SelectExpr(N.getOperand(1)); //value
-    if (N.getOperand(2).getOpcode() == ISD::GlobalAddress)
-      {
-	AlphaLowering.restoreGP(BB);
-	BuildMI(BB, Alpha::STORE, 2).addReg(Tmp1).addGlobalAddress(cast<GlobalAddressSDNode>(N.getOperand(2))->getGlobal());
-      }
-    else
-      {
-	Tmp2 = SelectExpr(N.getOperand(2)); //address
-	BuildMI(BB, Alpha::STQ, 3).addReg(Tmp1).addImm(0).addReg(Tmp2);
-      }
-    return;
+    {
+      Select(N.getOperand(0));
+      Tmp1 = SelectExpr(N.getOperand(1)); //value
+      MVT::ValueType DestType = N.getOperand(1).getValueType();
+      if (N.getOperand(2).getOpcode() == ISD::GlobalAddress)
+	{
+	  AlphaLowering.restoreGP(BB);
+	  if (DestType == MVT::i64) Opc = Alpha::STORE;
+	  else if (DestType == MVT::f64) Opc = Alpha::STT_SYM;
+	  else if (DestType == MVT::f32) Opc = Alpha::STS_SYM;
+	  else assert(0 && "unknown Type in store");
+	  BuildMI(BB, Opc, 2).addReg(Tmp1).addGlobalAddress(cast<GlobalAddressSDNode>(N.getOperand(2))->getGlobal());
+	}
+      else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N.getOperand(2))) 
+	{
+	  AlphaLowering.restoreGP(BB);
+	  if (DestType == MVT::i64) Opc = Alpha::STORE;
+	  else if (DestType == MVT::f64) Opc = Alpha::STT_SYM;
+	  else if (DestType == MVT::f32) Opc = Alpha::STS_SYM;
+	  else assert(0 && "unknown Type in store");
+	  BuildMI(BB, Opc, 2).addReg(Tmp1).addConstantPoolIndex(CP->getIndex());
+	}
+      else
+	{
+	  Tmp2 = SelectExpr(N.getOperand(2)); //address
+	  if (DestType == MVT::i64) Opc = Alpha::STQ;
+	  else if (DestType == MVT::f64) Opc = Alpha::STT;
+	  else if (DestType == MVT::f32) Opc = Alpha::STS;
+	  else assert(0 && "unknown Type in store");
+	  BuildMI(BB, Opc, 3).addReg(Tmp1).addImm(0).addReg(Tmp2);
+	}
+      return;
+    }
 
   case ISD::EXTLOAD:
   case ISD::SEXTLOAD:


Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.15 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.16
--- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.15	Tue Feb  1 21:36:35 2005
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.td	Wed Feb  2 11:32:39 2005
@@ -62,8 +62,10 @@
   def LOAD : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "ldq $RA,$DISP">; //Load quadword
   def LDW : PseudoInstAlpha<(ops GPRC:$RA, s16imm:$DISP, GPRC:$RB), "ldw $RA,$DISP($RB)">; // Load sign-extended word
   def LDB : PseudoInstAlpha<(ops GPRC:$RA, s16imm:$DISP, GPRC:$RB), "ldb $RA,$DISP($RB)">; //Load byte
-  def LDS_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "lds $RA,$DISP">; //Load quadword
-  def LDT_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "ldt $RA,$DISP">; //Load quadword
+  def LDS_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "lds $RA,$DISP">; //Load float
+  def LDT_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "ldt $RA,$DISP">; //Load double
+  def STS_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "sts $RA,$DISP">; //store float
+  def STT_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "stt $RA,$DISP">; //store double
 }
 
 let Uses = [R28, R23, R24, R25, R26] in






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