[llvm-commits] CVS: llvm/include/llvm/Target/TargetInstrInfo.h

[Chris Lattner]

Changes in directory llvm/include/llvm/Target:

TargetInstrInfo.h updated: 1.71 -> 1.72
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Log message:

Be consistent with our naming


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Diffs of the changes:  (+2 -2)

Index: llvm/include/llvm/Target/TargetInstrInfo.h
diff -u llvm/include/llvm/Target/TargetInstrInfo.h:1.71 llvm/include/llvm/Target/TargetInstrInfo.h:1.72
--- llvm/include/llvm/Target/TargetInstrInfo.h:1.71	Tue Sep 28 13:33:50 2004
+++ llvm/include/llvm/Target/TargetInstrInfo.h	Tue Sep 28 13:37:00 2004
@@ -48,7 +48,7 @@
 const unsigned M_CALL_FLAG		= 1 << 2;
 const unsigned M_RET_FLAG		= 1 << 3;
 const unsigned M_BARRIER_FLAG           = 1 << 4;
-const unsigned M_DELAY_SLOT             = 1 << 5;
+const unsigned M_DELAY_SLOT_FLAG        = 1 << 5;
 const unsigned M_CC_FLAG		= 1 << 6;
 const unsigned M_LOAD_FLAG		= 1 << 10;
 const unsigned M_STORE_FLAG		= 1 << 12;
@@ -208,7 +208,7 @@
   /// hasDelaySlot - Returns true if the specified instruction has a delay slot
   /// which must be filled by the code generator.
   bool hasDelaySlot(unsigned Opcode) const {
-    return get(Opcode).Flags & M_DELAY_SLOT;
+    return get(Opcode).Flags & M_DELAY_SLOT_FLAG;
   }
 
   virtual bool hasResultInterlock(MachineOpCode Opcode) const {