[llvm-commits] CVS: llvm/include/llvm/Target/TargetInstrInfo.h

[Chris Lattner]

Changes in directory llvm/include/llvm/Target:

TargetInstrInfo.h updated: 1.70 -> 1.71
---
Log message:

Capture information about whether the target instructions have delay slots


---
Diffs of the changes:  (+9 -0)

Index: llvm/include/llvm/Target/TargetInstrInfo.h
diff -u llvm/include/llvm/Target/TargetInstrInfo.h:1.70 llvm/include/llvm/Target/TargetInstrInfo.h:1.71
--- llvm/include/llvm/Target/TargetInstrInfo.h:1.70	Wed Sep  1 17:55:35 2004
+++ llvm/include/llvm/Target/TargetInstrInfo.h	Tue Sep 28 13:33:50 2004
@@ -48,6 +48,7 @@
 const unsigned M_CALL_FLAG		= 1 << 2;
 const unsigned M_RET_FLAG		= 1 << 3;
 const unsigned M_BARRIER_FLAG           = 1 << 4;
+const unsigned M_DELAY_SLOT             = 1 << 5;
 const unsigned M_CC_FLAG		= 1 << 6;
 const unsigned M_LOAD_FLAG		= 1 << 10;
 const unsigned M_STORE_FLAG		= 1 << 12;
@@ -193,6 +194,7 @@
   bool isBarrier(MachineOpCode Opcode) const {
     return get(Opcode).Flags & M_BARRIER_FLAG;
   }
+
   bool isCall(MachineOpCode Opcode) const {
     return get(Opcode).Flags & M_CALL_FLAG;
   }
@@ -202,6 +204,13 @@
   bool isStore(MachineOpCode Opcode) const {
     return get(Opcode).Flags & M_STORE_FLAG;
   }
+
+  /// hasDelaySlot - Returns true if the specified instruction has a delay slot
+  /// which must be filled by the code generator.
+  bool hasDelaySlot(unsigned Opcode) const {
+    return get(Opcode).Flags & M_DELAY_SLOT;
+  }
+
   virtual bool hasResultInterlock(MachineOpCode Opcode) const {
     return true;
   }