[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC32AsmPrinter.cpp PowerPCInstrInfo.td
Chris Lattner
lattner at cs.uiuc.edu
Sat Aug 14 16:27:41 PDT 2004
Changes in directory llvm/lib/Target/PowerPC:
PPC32AsmPrinter.cpp updated: 1.36 -> 1.37
PowerPCInstrInfo.td updated: 1.21 -> 1.22
---
Log message:
Print mflr using the asmwriter generator
---
Diffs of the changes: (+21 -2)
Index: llvm/lib/Target/PowerPC/PPC32AsmPrinter.cpp
diff -u llvm/lib/Target/PowerPC/PPC32AsmPrinter.cpp:1.36 llvm/lib/Target/PowerPC/PPC32AsmPrinter.cpp:1.37
--- llvm/lib/Target/PowerPC/PPC32AsmPrinter.cpp:1.36 Sat Aug 14 17:09:10 2004
+++ llvm/lib/Target/PowerPC/PPC32AsmPrinter.cpp Sat Aug 14 18:27:29 2004
@@ -27,6 +27,7 @@
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Mangler.h"
#include "Support/CommandLine.h"
@@ -82,6 +83,17 @@
void printMachineInstruction(const MachineInstr *MI);
void printOp(const MachineOperand &MO, bool LoadAddrOp = false);
void printImmOp(const MachineOperand &MO, unsigned ArgType);
+
+ void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT){
+ const MachineOperand &MO = MI->getOperand(OpNo);
+ if (MO.getType() == MachineOperand::MO_MachineRegister) {
+ assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physreg??");
+ O << LowercaseString(TM.getRegisterInfo()->get(MO.getReg()).Name);
+ } else {
+ printOp(MO);
+ }
+ }
+
void printConstantPool(MachineConstantPool *MCP);
bool runOnMachineFunction(MachineFunction &F);
bool doInitialization(Module &M);
Index: llvm/lib/Target/PowerPC/PowerPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PowerPCInstrInfo.td:1.21 llvm/lib/Target/PowerPC/PowerPCInstrInfo.td:1.22
--- llvm/lib/Target/PowerPC/PowerPCInstrInfo.td:1.21 Sat Aug 14 17:12:20 2004
+++ llvm/lib/Target/PowerPC/PowerPCInstrInfo.td Sat Aug 14 18:27:29 2004
@@ -15,7 +15,13 @@
include "PowerPCInstrFormats.td"
let isTerminator = 1, isReturn = 1 in
- def BLR : XLForm_2_ext<"blr", 19, 16, 20, 31, 1, 0, 0>;
+ def BLR : XLForm_2_ext<"blr", 19, 16, 20, 31, 1, 0, 0>;
+
+class II<dag OL, string asmstr> {
+ dag OperandList = OL;
+ string AsmString = asmstr;
+}
+
// Pseudo-instructions:
def PHI : Pseudo<"PHI">; // PHI node...
@@ -121,7 +127,8 @@
def LFD : DForm_8<"lfd", 50, 0, 0>;
def LFDX : XForm_25<"lfdx", 31, 599, 0, 0>;
def MFCR : XForm_5<"mfcr", 31, 19, 0, 0>;
-def MFLR : XFXForm_1_ext<"mflr", 31, 399, 8, 0, 0>;
+def MFLR : XFXForm_1_ext<"", 31, 399, 8, 0, 0>,
+ II<(ops GPRC:$reg), "mflr $reg">;
def MFCTR : XFXForm_1_ext<"mfctr", 31, 399, 9, 0, 0>;
def MTLR : XFXForm_7_ext<"mtlr", 31, 467, 8, 0, 0>;
def MTCTR : XFXForm_7_ext<"mtctr", 31, 467, 9, 0, 0>;
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