[llvm-commits] CVS: llvm/utils/TableGen/AsmWriterEmitter.cpp CodeGenInstruction.h CodeGenTarget.cpp CodeGenTarget.h

[Chris Lattner]

Changes in directory llvm/utils/TableGen:

AsmWriterEmitter.cpp updated: 1.5 -> 1.6
CodeGenInstruction.h updated: 1.3 -> 1.4
CodeGenTarget.cpp updated: 1.14 -> 1.15
CodeGenTarget.h updated: 1.10 -> 1.11
---
Log message:

Make the AsmWriter a first-class tblgen object.  Allow targets to specify
name of the generated asmwriter class, and the name of the format string.



---
Diffs of the changes:  (+32 -8)

Index: llvm/utils/TableGen/AsmWriterEmitter.cpp
diff -u llvm/utils/TableGen/AsmWriterEmitter.cpp:1.5 llvm/utils/TableGen/AsmWriterEmitter.cpp:1.6
--- llvm/utils/TableGen/AsmWriterEmitter.cpp:1.5	Tue Aug 10 23:08:36 2004
+++ llvm/utils/TableGen/AsmWriterEmitter.cpp	Sat Aug 14 17:50:53 2004
@@ -14,6 +14,7 @@
 
 #include "AsmWriterEmitter.h"
 #include "CodeGenTarget.h"
+#include "Record.h"
 #include <ostream>
 using namespace llvm;
 
@@ -28,13 +29,19 @@
   EmitSourceFileHeader("Assembly Writer Source Fragment", O);
 
   CodeGenTarget Target;
+
+  Record *AsmWriter = Target.getAsmWriter();
+
+  std::string AsmWriterClassName =
+    AsmWriter->getValueAsString("AsmWriterClassName");
+
   O <<
   "/// printInstruction - This method is automatically generated by tablegen\n"
   "/// from the instruction set description.  This method returns true if the\n"
   "/// machine instruction was sufficiently described to print it, otherwise\n"
   "/// it returns false.\n"
-    "bool " << Target.getName()
-            << "AsmPrinter::printInstruction(const MachineInstr *MI) {\n";
+    "bool " << Target.getName() << AsmWriterClassName
+            << "::printInstruction(const MachineInstr *MI) {\n";
   O << "  switch (MI->getOpcode()) {\n"
        "  default: return false;\n";
 


Index: llvm/utils/TableGen/CodeGenInstruction.h
diff -u llvm/utils/TableGen/CodeGenInstruction.h:1.3 llvm/utils/TableGen/CodeGenInstruction.h:1.4
--- llvm/utils/TableGen/CodeGenInstruction.h:1.3	Tue Aug 10 21:22:39 2004
+++ llvm/utils/TableGen/CodeGenInstruction.h	Sat Aug 14 17:50:53 2004
@@ -74,7 +74,7 @@
     bool isTwoAddress;
     bool isTerminator;
 
-    CodeGenInstruction(Record *R);
+    CodeGenInstruction(Record *R, const std::string &AsmStr);
 
     /// getOperandNamed - Return the index of the operand with the specified
     /// non-empty name.  If the instruction does not have an operand with the


Index: llvm/utils/TableGen/CodeGenTarget.cpp
diff -u llvm/utils/TableGen/CodeGenTarget.cpp:1.14 llvm/utils/TableGen/CodeGenTarget.cpp:1.15
--- llvm/utils/TableGen/CodeGenTarget.cpp:1.14	Tue Aug 10 21:22:39 2004
+++ llvm/utils/TableGen/CodeGenTarget.cpp	Sat Aug 14 17:50:53 2004
@@ -97,14 +97,27 @@
   return TargetRec->getValueAsDef("InstructionSet");
 }
 
+/// getAsmWriter - Return the AssemblyWriter definition for this target.
+///
+Record *CodeGenTarget::getAsmWriter() const {
+  return TargetRec->getValueAsDef("AssemblyWriter");
+}
+
+
 void CodeGenTarget::ReadInstructions() const {
   std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
 
   if (Insts.size() == 0)
     throw std::string("No 'Instruction' subclasses defined!");
 
-  for (unsigned i = 0, e = Insts.size(); i != e; ++i)
-    Instructions.insert(std::make_pair(Insts[i]->getName(), Insts[i]));
+  std::string InstFormatName =
+    getAsmWriter()->getValueAsString("InstFormatName");
+
+  for (unsigned i = 0, e = Insts.size(); i != e; ++i) {
+    std::string AsmStr = Insts[i]->getValueAsString(InstFormatName);
+    Instructions.insert(std::make_pair(Insts[i]->getName(),
+                                       CodeGenInstruction(Insts[i], AsmStr)));
+  }
 }
 
 /// getPHIInstruction - Return the designated PHI instruction.
@@ -117,10 +130,10 @@
   return I->second;
 }
 
-CodeGenInstruction::CodeGenInstruction(Record *R) : TheDef(R) {
+CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
+  : TheDef(R), AsmString(AsmStr) {
   Name      = R->getValueAsString("Name");
   Namespace = R->getValueAsString("Namespace");
-  AsmString = R->getValueAsString("AsmString");
 
   isReturn     = R->getValueAsBit("isReturn");
   isBranch     = R->getValueAsBit("isBranch");


Index: llvm/utils/TableGen/CodeGenTarget.h
diff -u llvm/utils/TableGen/CodeGenTarget.h:1.10 llvm/utils/TableGen/CodeGenTarget.h:1.11
--- llvm/utils/TableGen/CodeGenTarget.h:1.10	Sun Aug  1 02:42:39 2004
+++ llvm/utils/TableGen/CodeGenTarget.h	Sat Aug 14 17:50:53 2004
@@ -56,10 +56,14 @@
 
   MVT::ValueType getPointerType() const { return PointerType; }
 
-  // getInstructionSet - Return the InstructionSet object.
+  /// getInstructionSet - Return the InstructionSet object.
   ///
   Record *getInstructionSet() const;
 
+  /// getAsmWriter - Return the AssemblyWriter definition for this target.
+  ///
+  Record *getAsmWriter() const;
+
   /// getPHIInstruction - Return the designated PHI instruction.
   const CodeGenInstruction &getPHIInstruction() const;