[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h MachineInstrBuilder.h
Chris Lattner
lattner at cs.uiuc.edu
Sat Feb 28 23:07:01 PST 2004
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.141 -> 1.142
MachineInstrBuilder.h updated: 1.19 -> 1.20
---
Log message:
Continue Alkis's int64_t cleanup. This makes all of the immediate related
methods take an int or unsigned value instead of int64_t.
Also, add an 'addImm' method to the MachineInstrBuilder class, because the
fact that the hardware sign or zero extends it does not/should not matter
to the code generator. Once the old sparc backend is removed the difference
can be eliminated.
---
Diffs of the changes: (+23 -17)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.141 llvm/include/llvm/CodeGen/MachineInstr.h:1.142
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.141 Fri Feb 27 09:05:28 2004
+++ llvm/include/llvm/CodeGen/MachineInstr.h Sat Feb 28 23:06:49 2004
@@ -128,7 +128,7 @@
int regNum; // register number for an explicit register
// will be set for a value after reg allocation
private:
- MachineOperand(int64_t ImmVal = 0, MachineOperandType OpTy = MO_VirtualRegister)
+ MachineOperand(int ImmVal = 0, MachineOperandType OpTy = MO_VirtualRegister)
: immedVal(ImmVal),
flags(0),
opType(OpTy),
@@ -228,8 +228,8 @@
assert(opType == MO_MachineRegister);
return regNum;
}
- int64_t getImmedValue() const { assert(isImmediate()); return immedVal; }
- void setImmedValue(int64_t ImmVal) { assert(isImmediate()); immedVal=ImmVal; }
+ int getImmedValue() const { assert(isImmediate()); return immedVal; }
+ void setImmedValue(int ImmVal) { assert(isImmediate()); immedVal = ImmVal; }
MachineBasicBlock *getMachineBasicBlock() const {
assert(isMachineBasicBlock() && "Can't get MBB in non-MBB operand!");
@@ -522,7 +522,7 @@
/// addZeroExtImmOperand - Add a zero extended constant argument to the
/// machine instruction.
///
- void addZeroExtImmOperand(int64_t intValue) {
+ void addZeroExtImmOperand(int intValue) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already done!");
operands.push_back(
@@ -532,7 +532,7 @@
/// addSignExtImmOperand - Add a zero extended constant argument to the
/// machine instruction.
///
- void addSignExtImmOperand(int64_t intValue) {
+ void addSignExtImmOperand(int intValue) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already done!");
operands.push_back(
@@ -600,13 +600,13 @@
// Access to set the operands when building the machine instruction
//
- void SetMachineOperandVal (unsigned i,
- MachineOperand::MachineOperandType operandType,
- Value* V);
-
- void SetMachineOperandConst (unsigned i,
- MachineOperand::MachineOperandType operandType,
- int64_t intValue);
+ void SetMachineOperandVal(unsigned i,
+ MachineOperand::MachineOperandType operandType,
+ Value* V);
+
+ void SetMachineOperandConst(unsigned i,
+ MachineOperand::MachineOperandType operandType,
+ int intValue);
void SetMachineOperandReg(unsigned i, int regNum);
Index: llvm/include/llvm/CodeGen/MachineInstrBuilder.h
diff -u llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.19 llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.20
--- llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.19 Sat Feb 28 22:55:28 2004
+++ llvm/include/llvm/CodeGen/MachineInstrBuilder.h Sat Feb 28 23:06:49 2004
@@ -80,23 +80,29 @@
/// addMReg - Add a machine register operand...
///
- const MachineInstrBuilder &addMReg(
- int Reg,
- MachineOperand::UseType Ty = MachineOperand::Use) const {
+ const MachineInstrBuilder &addMReg(int Reg, MachineOperand::UseType Ty
+ = MachineOperand::Use) const {
MI->addMachineRegOperand(Reg, Ty);
return *this;
}
+
+ /// addImm - Add a new immediate operand.
+ ///
+ const MachineInstrBuilder &addImm(int Val) const {
+ MI->addZeroExtImmOperand(Val);
+ return *this;
+ }
/// addSImm - Add a new sign extended immediate operand...
///
- const MachineInstrBuilder &addSImm(int64_t val) const {
+ const MachineInstrBuilder &addSImm(int val) const {
MI->addSignExtImmOperand(val);
return *this;
}
/// addZImm - Add a new zero extended immediate operand...
///
- const MachineInstrBuilder &addZImm(int64_t Val) const {
+ const MachineInstrBuilder &addZImm(unsigned Val) const {
MI->addZeroExtImmOperand(Val);
return *this;
}
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